Scope: This dossier assesses Italy’s semiconductor value chain within the EU-27 and against Taiwan, South Korea, the United States, China, Japan and Singapore, distinguishing verified operating capabilities from investment commitments and conditional outcomes through 2030–2035.

Executive Summary / BLUF

Italy’s strongest strategic opportunity is to deepen its contribution to power semiconductors, specialty manufacturing, wafer materials and testing while establishing commercially viable advanced packaging capacity.

The industrial baseline has advanced: STMicroelectronics reported that its new 200 mm silicon-carbide manufacturing in Catania entered ramp-up in Q2 2026, and MEMC inaugurated Novara’s FAB300 silicon-wafer facility in October 2025. Neither milestone establishes full utilisation or qualified output at design capacity. sec.gov

Catania’s approximately €5 billion programme and Silicon Box’s €3.2 billion Novara project remain distinct investments with different technologies, customers and execution risks; both have published full-capacity horizons of 2033, beyond the EU’s 2030 target. ST News

Technoprobe provides an established connection to advanced computing: its consolidated H1 2026 revenue reached €464.1 million, up 42.4% year on year, principally supported by AI-related demand. This is group revenue, not Italian production value or a global market-share measure. emarketstorage.it

The European Court of Auditors’ 2025 assessment cited a forecast of 11.7% EU participation in the global semiconductor value chain by 2030, substantially below 20%; that forecast must retain its original vintage. The EU’s strategy for microchips

The immediate policy priority is to measure qualified output, customer commitments, access rights and dependency reduction alongside capital expenditure. Confidence is high in the documented milestones and moderate in their eventual sovereignty benefits, which depend on execution and commercial adoption.

REPORT – Monopolizing Compute: Geopolitical Impact of Semiconductor Inflation

Italy’s chip subsidies need an industrial return

Italy’s semiconductor strategy now turns on whether public commitments become qualified production that European industry can use. STMicroelectronics’ disclosure that its new Catania operation entered manufacturing ramp-up in the second quarter of 2026 moves one investment into an operating test; Invitalia’s approval of Silicon Box financing on 1 October leaves another facing construction, technology transfer and customer qualification. The distinction carries fiscal and security consequences. Under the European Chips Act, Rome is supporting capabilities whose value depends on manufacturing performance, commercial adoption and reliable access during disruption. The governing choice is how to attach public money to those outcomes while preserving the flexibility to slow equipment purchases when demand weakens. Otherwise, taxpayers finance assets whose contribution to European autonomy remains smaller than their announced scale.

The funding buys location; production must earn its place

The financial model behind Catania is more revealing than the rounded investment announcement. The European Commission’s state-aid decision records €5,058.6 million in nominal capital expenditure and €2,063.2 million in nominal aid across the project model. That support changes the economics of locating and integrating production in Europe. The decision distinguishes manufacturing substrates internally from purchasing them, and investing in Catania from expanding front-end and back-end activities outside the European Economic Area. Its counterfactual establishes what government is purchasing: European location, deeper integration and the accumulation of manufacturing knowledge.

Silicon Box’s announced €3.2 billion Novara investment carries €1.3 billion in public support, leaving a €1.9 billion arithmetic financing residual. That residual cannot be treated as evidence that all private financing is committed through construction and ramp-up. The earlier Catania substrate project also had its own €730 million investment and €292.5 million grant approved in 2022. Before aggregating successive announcements, the government must reconcile their assets, eligible costs and expenditure periods. Otherwise, industrial ambition can grow on paper through repeated descriptions of related infrastructure.

Technoprobe supplies a useful contrast in evidence. Its first-half 2026 report identifies €2,459,095.62 in grants received on 23 October 2025 for the completed TERABIT ERA project, against €10,863,446.79 in eligible costs. The disclosure connects a named programme, expenditure, payment and settlement. Its relevance is administrative: approval, award and receipt are different events, and a national investment ledger should show which has occurred.

Catania’s next bottleneck is the saleable device

STMicroelectronics’ second-quarter 2026 manufacturing start changes the question for Catania. Government must now examine whether the operation can stabilise processes, improve yields and qualify products quickly enough to support sustainable loading. Installed equipment has industrial value only through the output it can repeatedly deliver. A production ramp that generates engineering samples has crossed an important threshold, but customer acceptance and reliable commercial deliveries determine whether the investment can support the next equipment phase.

The integrated Catania programme brings substrates, epitaxy, device fabrication, packaging and testing into a closely connected production system. Under the European Chips Act investment framework, that integration offers a defensible resilience benefit: defects discovered downstream can inform process changes upstream, while more engineering knowledge remains within the European production route. Yet integration also concentrates exposure to a common site, utilities and technical teams. Public oversight should therefore examine both the efficiency of the integrated route and the availability of qualified alternatives when one part fails.

STMicroelectronics’ first-half 2026 accounts also show why the funding assessment needs care: its group-wide cash expenditure on tangible assets differs from its defined net capital expenditure after grant-related adjustments. Neither measure identifies what Catania alone has received or installed. Rome needs project-level evidence before interpreting corporate spending as national progress, particularly when the company adjusts capital allocation to market conditions.

Novara needs customers before its capacity has meaning

Silicon Box’s original announcement envisaged construction starting in the second half of 2025 and production beginning in 2028. The City of Novara’s account of 1 October 2026 instead described further steps toward construction authorisation and targeted the following spring for works to begin. That sequence does not justify inventing a replacement production date. It does require the original timetable to be tested against a current construction, equipment, technology-transfer and qualification plan.

The European Commission’s March 2026 award of Open EU Foundry status establishes recognition under the European Chips Act. It does not establish that European customers have adopted Silicon Box’s packaging platform. Those customers need compatible design rules, package models, thermal performance, test coverage and reliability evidence. They also need access to the dies and materials that the package will combine. A packaging facility can remove one important dependency while remaining exposed to several others.

The MEMC FAB300 inauguration in October 2025 presents the upstream version of the same issue. A completed physical milestone strengthens the investment case, but approved product families and sustained shipments establish how much useful supply European fabrication can obtain. MEMC’s TèNeT programme, supported through NextGenerationEU and IPCEI ME/CT, should consequently be evaluated through customer qualification and substitution capability. Wafer diameter and factory completion cannot establish whether a European customer can replace an interrupted source.

State-aid approval cannot settle the commercial case

The European Chips Act creates a framework within which investment can be supported; it does not remove the need to test each project’s financing and industrial logic. The European Court of Auditors’ 2025 assessment identified a fragmented funding architecture, with much depending on Member States and private investment beyond the Commission’s direct control. That structure makes national announcements politically visible while leaving the European return dependent on coordination among projects, customers and funding authorities.

IPCEI ME/CT addresses innovation and first industrial deployment, with obligations intended to spread benefits beyond individual recipients. Its institutional purpose differs from a general subsidy for routine mass production. Italy should therefore distinguish a research result, a transferred manufacturing process and sustained commercial output when judging programme success. Counting participation as industrial delivery obscures where further engineering or customer investment is still required.

Catania’s state-aid decision contains clawback tests scheduled for 2031, 2034 and 2038. These provisions protect against overcompensation if the project outperforms the notified financial assumptions; they do not remove the need for earlier execution review. By the time a retrospective financial test operates, government may already have paid for equipment whose loading or qualification has disappointed. Monitoring must influence decisions while expenditure can still be rephased.

European autonomy depends on connected production routes

The Commission’s Chips Act 2.0 proposal of June 2026 gives Italy a negotiating opening around industrial deployment, strategic dependencies and coordination. At the dossier’s October cut-off, the European Parliament’s procedure remained awaiting committee decision. Proposed provisions therefore cannot be entered into investment plans as enacted rights or assured resources. Rome’s strongest position is to demonstrate which missing interfaces prevent existing European capabilities from operating together.

Silicon Box illustrates the external constraint. European packaging capacity can strengthen bargaining power and shorten a production route, but it cannot supply advanced logic or memory dies that the route still imports. Catania can deepen European power-semiconductor capability without replacing those computing dependencies. The European Chips Act should be judged through the critical products and functions that become supportable, alongside aggregate market share.

The CNR-coordinated WBG pilot-line programme offers a practical test of European integration. Its value will depend on external users completing programmes and transferring results into industrial processes. Research access, supplier qualification and customer engineering can determine whether a large production asset becomes commercially useful. The next public euro should therefore compete against the cost of resolving such bottlenecks, rather than receive preference merely because it finances another visible construction project.

The next two years will allocate the cost of delay

Over the next 12–24 months, Catania’s yield and customer approvals, Novara’s construction and financing sequence, and MEMC’s qualified shipments will determine whether the European Chips Act portfolio advances toward usable capacity. Inaction would leave taxpayers carrying expenditure ahead of industrial returns, manufacturers paying for prolonged external dependence, and workers exposed to recruitment plans detached from operating demand. MIMIT, MEF and Invitalia should connect payments, certified assets and qualified output in a common decision record. That would allow support to continue, slow or change scope on evidence. Without it, the cost of reconciling political commitments with commercial reality will arrive after much of the money has been spent.

Taiwan Semiconductor Hegemony: US Tech Decoupling

---

Navigational Index

Pillar I — Italian Industrial Capabilities and Technological Depth

Chapter 1. Italian Semiconductor Ecosystem — Full Value-Chain Mapping
Company and site mapping across silicon and SiC substrates, front-end fabrication, packaging and testing, production equipment, materials, logistics, discrete devices and research. Coverage includes STMicroelectronics, Technoprobe, GlobalWafers/MEMC, LFoundry, Tower Semiconductor, Silicon Box, SPEA, Osai, Seica, NXP, Infineon, onsemi and Micron, with each Italian presence classified by its actual function.

Chapter 2. Technology Focus Areas and Competitive Advantages
SiC integration and manufacturing economics; power electronics; probe cards and test systems; specialty analog and mixed-signal processes; advanced packaging; design, materials and equipment gaps.

Pillar II — European Position and Global Competitive Structure

Chapter 3. European Comparison
Italy compared with Germany, France, the Netherlands, Ireland and Austria, with a separate United Kingdom lens and an EU-27 assessment. Comparisons distinguish manufacturing location, corporate ownership, technology, capacity, research intensity and public support.

Chapter 4. Global Competitive Positioning
Segment-specific comparison with Taiwanese foundries, Korean memory and logic producers, US manufacturers and design ecosystems, Chinese foundries, Japanese materials and equipment suppliers, and Singapore’s manufacturing and packaging ecosystem.

Pillar III — Investment Execution, Sovereignty and Policy Choices

Chapter 5. Strategic Investments, European Chips Act and Industrial Policy
Catania, Silicon Box Novara, MEMC and other material expansions; investment additionality, state aid, IPCEI participation, infrastructure, skills and implementation risk.

Chapter 6. Risks, Dependencies and Scenarios
External dependencies and three conditional pathways through 2030–2035: baseline execution, accelerated European build-out, and constrained or delayed investment.

Chapter 7. Data Sources, Methodologies and Priority Intelligence Questions
Comparable capacity and market-share definitions, evidence confidence, unresolved records and the highest-priority questions for Italian and European decision-makers.

---

China – Workforce Realignment + AI/Semiconductor Tech Context

Master Abstract

Italy’s contribution must be assessed by industrial function

The evidence supports an Italian strategy built around specific capabilities whose importance cannot be captured adequately by counting fabs or comparing nominal process nodes. ST’s Q2 2026 filing identifies Catania’s transition into 200 mm SiC manufacturing ramp-up and continuing investment in Agrate’s 300 mm analog, mixed-signal and smart-power production. Tower’s financial statements separately establish that its shared Agrate operation completed comprehensive qualification and began volume production in Q4 2024. These disclosures demonstrate an operating manufacturing base undergoing technological transition, although they do not establish a consolidated Italian capacity figure, current utilisation or customer-qualified output by process. The decision consequence is to assess each facility through its function, process platform, yield, qualification status and accessible capacity. Aggregating silicon substrates, power-device wafers and packaging panels into a single national production total would obscure the capabilities that government support is intended to secure. sec.gov

Catania provides the clearest case for strengthening a vertically integrated Italian specialisation. ST’s announced programme connects substrate development, epitaxy, front-end processing, module assembly and testing within one campus. Its original investment announcement specified approximately €5 billion, including approximately €2 billion of Italian support, and an eventual capacity of up to 15,000 wafers per week in 2033. These are programme parameters, not evidence of present output. The subsequent manufacturing start materially strengthens the execution case, but the strategic return still depends on process stability, customer qualification, competitive device costs and sustained demand. Integration can reduce exposure to intermediate supply disruptions and improve coordination between process stages; it also concentrates execution responsibilities within one industrial programme. Public monitoring should therefore follow qualified output and cost performance across the integrated chain, rather than treating the installation of equipment as completion of the sovereign capability. ST News

Packaging and testing offer different routes into advanced systems

Silicon Box’s Novara project would add a distinct capability: panel-level packaging and testing that integrates multiple dies or chiplets into a package. The European Commission granted the project Open EU Foundry status in March 2026 and identified 2033 as its expected full-capacity horizon. That designation is a regulatory milestone; it does not establish commissioning, production yield or customer acceptance. The analytical distinction matters because advanced packaging can increase the value captured in Europe even when constituent dies are fabricated elsewhere, while dependence on those dies persists. Accordingly, the sovereignty assessment must examine which package architectures, interconnect technologies, customers and supply commitments the facility will support. Capacity becomes strategically useful when European firms can qualify products, obtain dependable production access and sustain manufacture during disruption. A nominal packaging capability without the necessary design interfaces, materials and qualified demand would deliver a more limited resilience benefit. Shaping Europe’s digital future

Technoprobe illustrates an established Italian participation in technologically advanced global production without domestic fabrication of the underlying processors. Its H1 2026 filing reports €464.1 million in revenue, with 54.5% billed to Asia and 42.0% to America; the company attributes growth principally to higher volumes associated with artificial intelligence. These figures establish commercial exposure and scale, while billing geography does not identify the final manufacturing location or nationality of every customer. The policy implication is that Italy’s semiconductor interests extend beyond supplying Italian fabs: specialised testing capabilities can capture value from international investment in advanced computing. This creates an opportunity to retain research, engineering and manufacturing competencies in Italy, alongside exposure to overseas customers and capital-expenditure cycles. Probe cards must nevertheless remain analytically separate from complete automated-test systems, inspection and metrology equipment, and outsourced assembly-and-test services; strength in one category cannot establish leadership across all testing activities. emarketstorage.it

European autonomy requires complementary capacity and dependable access

The global comparison must preserve differences between technology leadership, manufacturing scale and supply-chain control. TSMC’s 2025 annual report states that technologies at 7 nm and more advanced accounted for 74% of its wafer revenue; this measures the company’s revenue mix, not its global market share. The same report identifies Dresden’s planned processes as 28/22 nm planar CMOS and 16/12 nm FinFET. These disclosures demonstrate why a European fabrication investment cannot automatically be described as closing the most advanced logic gap. For Italy, a defensible industrial strategy would link specialty manufacturing, power devices, materials and packaging to complementary European and international capabilities, while identifying precisely where access remains vulnerable. European location, European ownership, control of intellectual property and contractual supply assurance are separate dimensions of sovereignty. None alone establishes that automotive, energy or defence customers will receive the required components under crisis conditions. investor.tsmc.com

The European policy baseline also requires temporal discipline. The Court of Auditors concluded in 2025 that the Chips Act was very unlikely to achieve the 20% target under the investment conditions assessed, citing a Commission forecast published in July 2024. That finding is a documented warning about scale and implementation, rather than a fresh October 2026 forecast. The Commission subsequently presented a Chips Act 2.0 legislative proposal on 3 June 2026. Its announcement establishes a proposed policy response, not enacted entitlements or delivered capacity. For Italian decision-makers, the practical assessment is therefore whether support creates additional, qualified and commercially sustainable European capability, and whether it secures access to strategically necessary products. An investment can improve resilience while contributing only modestly to aggregate market share; conversely, revenue growth can leave critical external dependencies substantially intact. The EU’s strategy for microchips

Key Evidence Table

Confidence describes support for the stated fact, not the probability that an investment will achieve its intended outcome. High denotes an explicit regulatory filing or competent institutional record; moderate denotes an announced future parameter whose delivery remains conditional.

Indicator	Value/status	Reference date	Definition/scope	Issuer	Exact source
Catania 200 mm SiC manufacturing	Manufacturing started and entered ramp-up; high confidence	Q2 2026	Reported operational milestone; no site-specific qualified-output figure established here	STMicroelectronics	Q2 2026 Form 6-K, operating review. sec.gov
Catania investment programme	Approximately €5bn, including approximately €2bn Italian support; moderate confidence in eventual delivery	Announced 31 May 2024	Multi-year programme values; not cumulative expenditure or aid disbursement	STMicroelectronics	“STMicroelectronics to build the world’s first fully integrated silicon carbide facility in Italy.” ST News
Catania ultimate capacity	Up to 15,000 wafers/week at full build-out in 2033; moderate	2024 announcement	Future design capacity; not current production	STMicroelectronics	Same investment announcement, capacity paragraph. ST News
Tower/ST Agrate	Qualification completed; volume production commenced in Q4 2024; high	FY2025 financial statements	Shared 300 mm facility; ST manages operations	Tower Semiconductor	FY2025 financial statements, TSIT collaborative arrangement. 2026
MEMC Novara FAB300	Inaugurated 15 October 2025; high for inauguration	15 October 2025	Silicon-wafer manufacturing; inauguration does not establish utilisation	GlobalWafers/MEMC	FAB300 inauguration announcement. memc.it
Silicon Box investment	Up to €3.2bn; moderate	2024 location announcement	Proposed advanced packaging and test investment in Novara	Silicon Box	“Silicon Box selects Piedmont to host €3.2B chip foundry for Italian expansion.” silicon-box.com
Silicon Box regulatory status and horizon	Open EU Foundry status granted; full capacity expected in 2033; high for designation, moderate for horizon	16 March 2026; page updated August 2026	Panel-level packaging and testing; designation does not establish operating readiness	European Commission	“Open EU Foundry status granted to innovative chiplet facility.” Shaping Europe’s digital future
Technoprobe commercial scale	€464.1m revenue; +42.4% year on year; high	H1 2026	Consolidated group revenue, nominal euros	Technoprobe	Half-Year Financial Report as of 30 June 2026, financial highlights and revenue analysis. emarketstorage.it
EU 2030 outlook in audited record	11.7% forecast against 20% target; high for historical attribution	July 2024 forecast, assessed in 2025	Global value-chain revenue measure; not physical wafer capacity	European Court of Auditors	Special Report 12/2025, executive summary and paragraph 91. The EU’s strategy for microchips
Chips Act 2.0	Legislative proposal presented; high for announcement	3 June 2026	Proposed measures; announcement alone does not establish adoption	European Commission	“Commission proposes tech sovereignty package to strengthen Europe’s digital autonomy and resilience.” Shaping Europe’s digital future

The investment figures are not additive measures of public expenditure. Group revenues, substrate production, device fabrication and packaging capacity also require separate denominators.

Competing Pathways to 2030–2035

These are conditional scenarios, not probability-weighted forecasts.

Pathway	Mechanism	Diagnostic indicators	Implication for Italy and Europe
Baseline execution	Announced programmes advance through staged commissioning, qualification and commercial ramp-up	Qualified production increases; customer approvals broaden; construction and equipment milestones remain consistent with disclosed schedules	Greater capability in selected segments by 2030, with substantial programme maturation extending into the following years
Accelerated European build-out	Manufacturing investment is accompanied by customer commitments, research transfer, workforce development and dependable supplier access	Earlier customer qualifications; multiple European customers; stronger domestic supplier participation; demonstrated access to complementary dies and materials	Increased European value capture and greater ability to sustain selected industrial supply chains
Constrained or delayed investment	Financing, infrastructure, qualification, cost competitiveness or demand restricts implementation	Deferred tool installation; repeated timetable changes; weak utilisation; customer qualification slippage; greater reliance on imported intermediate products	Reduced additional capability and lower strategic return on public support

The documented manufacturing start at Catania supports the execution pathway for that site. It does not resolve Silicon Box’s separate commissioning risk or establish the commercial performance of either programme.

Principal Gaps and Watch Indicators

Industrial-map coverage. The supplied attachment contains the reporting protocol; it does not contain the referenced industrial map. Consequently, this opening does not claim to have inspected every company visible on that map. Chapter 1 must distinguish the named company universe from additions established through documentary research.

Qualified output. The decisive missing measures are site-level wafer starts, yields, customer-qualified output, utilisation and the share available to external customers. Equipment installation and announced design capacity cannot substitute for these observations.

Public financial exposure. Approved aid ceilings, contractual commitments, disbursements and verified expenditure must be reconciled project by project. Italy’s share of Chips Act-related support requires a defined denominator and treatment of overlapping national, EU and IPCEI mechanisms.

Domestic value capture. Employment should be reported by Italian site and function, separating existing personnel, recruitment, construction employment and projected permanent jobs. Consolidated multinational headcounts cannot establish Italian employment.

Supply assurance. Government needs evidence of customer access, allocation arrangements, qualified alternative suppliers and contractual continuity provisions. Manufacturing location alone does not establish priority supply for critical users.

Comparable global shares. Foundry revenue, installed wafer capacity, SiC device sales, substrate sales, probe cards, automated-test equipment and advanced-packaging services require separate benchmarks. Unsupported precision would distort the investment comparison.

Research-to-production transfer. The relevant indicators for Chips.IT, CNR, FBK and Polifab are accessible process platforms, industrial users, qualified transfers, design support and demonstrable production adoption, rather than research expenditure alone.

For this opening, the verified numerical observations use incompatible units and describe different industrial functions; a combined capacity or market-share graphic would mislead.

---

Pillar I — Italian Industrial Capabilities and Technological Depth

Chapter 1. Italian Semiconductor Ecosystem — Full Value-Chain Mapping

Italy possesses a substantial semiconductor manufacturing and engineering base, but its strategic value emerges only when individual sites are classified by their actual industrial functions. Substrate production, device fabrication, probe-card manufacturing, equipment supply, product design and research infrastructure contribute differently to technological sovereignty; placing them in a single undifferentiated category overstates manufacturing completeness and obscures the dependencies that remain.

The appropriate unit of analysis is therefore the site–process–product relationship, supplemented by ownership, customer access and qualification status. An Italian research centre belonging to a multinational can retain valuable design expertise without controlling production allocation; an Italian factory can manufacture commercially important devices while depending on externally controlled process tools; and an equipment manufacturer can hold a strong international position without operating a semiconductor wafer fab. These distinctions govern the mapping below.

The company universe covers the firms specified in the mandate and additional participants established through the retrieved primary record. Because the referenced industrial map itself was not supplied, the assessment does not claim an exhaustive transcription of its contents.

Substrates and front-end manufacturing: different assets within the same national ecosystem

The materials chain begins before device fabrication. GlobalWafers/MEMC’s Italian operations connect silicon-crystal production in Merano with wafer manufacturing in Novara, while ST’s Catania development concerns the separate SiC materials and device chain. Silicon-wafer capacity cannot be treated as interchangeable with SiC-substrate capacity: the materials, growth processes, equipment requirements and customer qualifications differ.

MEMC describes Merano as producing crystals in 150, 200 and 300 mm diameters for subsequent processing within its international network. Its Novara operation has an established 200 mm wafer business, alongside the separately documented FAB300 development. These activities place Italy upstream of device manufacturers, but they do not establish domestic manufacture of every required substrate specification or the availability of all output to European customers. Chi siamo — MEMC Electronic Materials — undated, accessed 19 October 2026. memc.it

Value-chain stage	Company and Italian location	Verified technological function	Status and capacity interpretation	Strategic significance
Silicon crystal growth	GlobalWafers/MEMC, Merano	Silicon crystals in 150, 200 and 300 mm diameters; specifications include dopant concentration, orientation and impurity requirements	Established operation; current qualified output by diameter is not disclosed in the cited profile	Upstream materials knowledge and production supporting the wider wafer network
Silicon-wafer manufacture	GlobalWafers/MEMC, Novara	Established 200 mm wafer production; FAB300 adds a 300 mm materials capability	FAB300 inauguration is documented; production volume and utilisation require separate evidence	European substrate availability and materials diversification
SiC materials and devices	STMicroelectronics, Catania	Integrated development spanning substrates, epitaxy, power-device fabrication and associated back-end activities	The new manufacturing operation is in ramp-up; individual process-stage throughput must be distinguished	Opportunity to retain interconnected materials and device competencies
Silicon specialty fabrication	STMicroelectronics, Agrate Brianza	200 mm and 300 mm manufacturing; smart power, BCD and MEMS capabilities	Established manufacturing, with continuing product and capacity reallocation	Scale in differentiated processes serving industrial and automotive applications
Specialty foundry	Tower Semiconductor, shared Agrate facility	Current manufacturing overview lists 300 mm, 65 nm RF-SOI	Shared physical facility; capacity must not be counted again as a separate standalone Italian fab	External-customer access to a specialised foundry platform
Specialty foundry	LFoundry, Avezzano	Proprietary 150/110 nm CMOS platforms; image-sensor processes down to 90 nm; backside illumination	Company advertises approximately 40,000 wafers/month on 200 mm; this is capacity, not verified realised output	Specialty manufacturing, imaging expertise and an alternative customer-facing foundry base
Discrete power devices	Vishay Semiconductor Italiana, Borgaro Torinese	Documented development of high-voltage FRED Pt diode processes, including chip thinning	Established site; the cited project announcement does not quantify current capacity	Broadens the Italian power-semiconductor base beyond ST

Sources: Chi siamo — MEMC — undated; GlobalWafers inaugura a Novara FAB300 — MEMC — 15 October 2025; Agrate, Italy — STMicroelectronics — undated; Worldwide Facilities and Operational Capabilities — Tower Semiconductor — undated; Company — LFoundry — undated; Vishay Intertechnology Plant in Borgaro Turin, Italy, Receives R&D Grant for WATT4FRED Project — Vishay — August 2022. www.memc.it

LFoundry’s technical disclosures illustrate why nominal node descriptions require careful interpretation. Its published smallest critical dimension of 65 nm is not equivalent to offering a general-purpose 65 nm logic platform: the same page separately identifies its available proprietary CMOS platforms and its 90 nm volume-production capability. For government benchmarking, the usable manufacturing offer consists of qualified process modules, design rules, libraries and customer products, rather than the smallest feature that an individual process can produce. Company — LFoundry — undated.

A similar discipline applies to Tower. Its current site overview identifies Agrate with RF-SOI at 65 nm, while its broader corporate portfolio includes other analog and power technologies manufactured elsewhere. Those platforms should not automatically be assigned to Italy. This is consequential for procurement and investment policy: a domestic fab constitutes a usable alternative only where the required process, intellectual property and customer qualification are actually available at that location. Worldwide Facilities and Operational Capabilities — Tower Semiconductor — undated.

Packaging, test and equipment: several complementary industries

Italy’s equipment base spans process tools, electrical interfaces, automated testing and production handling. These businesses occupy different points in the manufacturing flow. LPE supplies epitaxial reactors; Technoprobe supplies probe cards and related interfaces; SPEA supplies integrated test equipment; Osai combines handling, assembly and test automation; and Seica provides test systems covering discrete power-device characterisation and thermal behaviour.

The distinction between a tester and a test interface is particularly important. A probe card connects the measurement system to the device; it does not replace the tester, wafer positioning system, test software or reliability programme. Conversely, owning a tester supplier does not establish control over all contact technologies, instrumentation components or manufacturing software required by a customer.

Industrial function	Company and location	Documented specialisation	Correct classification	Principal limitation in the public record
Epitaxy equipment	LPE, Italian operations within ASM	Reactors for SiC and silicon epitaxy	Front-end process equipment	Italian activity must be distinguished from Dutch parent control and the wider ASM supply chain
Probe cards and interfaces	Technoprobe; Cernusco Lombardone, Agrate, Osnago, Vimercate and Catania listed in its Italian network	Cantilever and TPEG Vertical MEMS technologies; motherboards and final-test boards	Test interfaces and precision microfabrication	The location directory does not establish each site’s production volume or exact functional allocation
Semiconductor test equipment	SPEA, Volpiano	Integrated known-good-die test cells, power instrumentation and handling for SiC/GaN devices	Automated test equipment and integrated test cells	Product specifications are manufacturer claims, not independent throughput or market-share measurements
Handling and assembly automation	Osai, Parella	MEMS calibration; power-device and module testing; burn-in handling; automated module assembly	Production automation, assembly and test handling	Semiconductor-only revenue and qualified installed capacity are not established by the product page
Power-device and probe-card testing	Seica, Strambino	S20 static/dynamic device tests; thermal resistance and power cycling; probe-card testing	Test and characterisation systems	Announced technical coverage does not establish global segment leadership
Advanced packaging and test services	Silicon Box, planned Novara facility	Panel-level integration of multiple dies/chiplets and associated testing	Advanced packaging and test foundry	Commercial readiness, qualified package families and customer volumes remain separate execution questions

Sources: ASM Completes Acquisition of LPE — ASM International — October 2022; Worldwide — Technoprobe — undated; Our technologies — Technoprobe — undated; SPEA elevates KGD testing with next-gen Integrated Test Cells powered by the new H7000 Handling Platform — SPEA — undated; Semiconductor — Osai — undated; Power Semiconductor Testers — Seica — undated; Open EU Foundry status granted to innovative chiplet facility — European Commission — March 2026. globenewswire.com

LPE’s inclusion materially changes the assessment of Italy’s position in SiC. The ecosystem contains capabilities in manufacturing the equipment used to deposit epitaxial material, extending its participation beyond the production of finished devices. ASM completed the acquisition in October 2022, making LPE a wholly owned subsidiary. The resulting capability is located within Italy but embedded in a European multinational equipment organisation; treating it as either wholly autonomous Italian technology or an entirely external dependency would misrepresent its industrial position. ASM Completes Acquisition of LPE — ASM International — October 2022.

Vishay’s Borgaro activity also deserves separate treatment because discrete devices are often underrepresented in semiconductor strategies dominated by processors. Its WATT4FRED project concerns fabrication and thinning processes for high-voltage diodes used in automotive and industrial applications. The relevant industrial asset is the combination of process expertise, device behaviour and production integration; the 2022 announcement establishes that project’s scope, but cannot establish its subsequent completion or present output. Vishay Intertechnology Plant in Borgaro Turin, Italy, Receives R&D Grant for WATT4FRED Project — Vishay — August 2022.

Design and development: valuable competencies without equivalent domestic fabrication

The Italian presence of major international semiconductor firms must be counted according to the activity performed. NXP identifies Milan with sales and R&D, and Catania with R&D. Infineon describes Italian activities spanning product definition, analog and digital design, verification, application engineering and testing. onsemi explicitly classifies Milan as a design centre. These are meaningful industrial capabilities, but none of these location descriptions establishes an Italian production fab operated by the respective company.

Company	Italian presence established by the source	Function attributable to Italy	Capacity claim that the evidence does not support
NXP	Milan; Catania/Sant’Agata Li Battiati	Sales, field application engineering and R&D for automotive and industrial solutions	An Italian NXP front-end manufacturing plant
Infineon	Milan, Padua and Pavia within its Italian organisation	Product development, analog/digital/mixed-signal design, applications, verification and test engineering	Domestic fabrication of Infineon’s wider global power-device portfolio
onsemi	Milan	Design centre	Italian SiC substrate or device manufacturing
Micron	Current location directory lists Arzano, Avezzano and Vimercate; an older company account also described Padua	Documented Italian memory-development and engineering expertise	Contemporary Italian high-volume DRAM or NAND wafer manufacture
STMicroelectronics, Castelletto	Established R&D location; new Digital Twin centre project announced in September 2026	MEMS, smart power, BCD, automotive/industrial ICs, packaging and system-integration R&D	Completed delivery of the newly announced Digital Twin centre

Sources: NXP in Italy — NXP — undated; Your career in Italy — Infineon — undated; Worldwide Locations — onsemi — undated; Locations — Micron — undated; Micron sites in Europe: Small but mighty great workplaces — Micron — historical company account; ST is transforming semiconductor R&D: Moving from physical iteration to digital anticipation — STMicroelectronics — September 2026. NXP Semiconductors

Micron’s records illustrate a consequential freshness issue. Its earlier account described four Italian sites and just over 500 employees, but discussed the 2021 workplace rankings; the current location directory reviewed here lists three Italian addresses. The older account supports the historical character of the Italian technical contribution, including memory design, modelling and characterisation, but its workforce number cannot be promoted into a current employment estimate. The discrepancy does not establish that the omitted location has closed; it establishes that a current site-and-headcount reconciliation is necessary. Micron sites in Europe: Small but mighty great workplaces — Micron — historical account; Locations — Micron — undated.

The strategic interpretation is that Italy retains expertise relevant to internationally manufactured products. The degree of national control depends on who owns the design, who decides subsequent investment, which teams retain process knowledge and whether the organisation can qualify alternative manufacturing routes. Employment in design is therefore an important indicator of capability, but cannot serve as a proxy for independent access to the resulting chips.

Research infrastructure: separating prototyping, pilot lines and production

The Italian research network performs several distinct functions. Chips-IT addresses integrated-circuit design and technology transfer; CNR-IMM connects materials and device research with the wide-bandgap pilot-line initiative; FBK operates fabrication and integration facilities; and PoliFab provides university-based micro- and nanofabrication.

The industrial value of this network depends on the transfer of repeatable processes, validated models and manufacturable designs. Cleanroom area and equipment lists establish research resources, but do not establish commercial wafer capacity.

Institution	Location and documented capability	Quantified evidence	Appropriate industrial interpretation
Fondazione Chips-IT	Headquarters in Pavia; Bologna-area site; industrial research in IC and semiconductor development	Two locations identified on its institutional page	Design and research organisation, rather than a volume manufacturing fab
CNR-IMM / WBG Pilot Line	Catania coordination; research-to-industrialisation infrastructure for SiC and GaN	CNR’s May 2025 announcement gives €360m for the seven-country project	Multinational pilot-line programme; the full amount must not be attributed to Italian expenditure
Chip4Power consortium	CNR, FBK, Chips-IT and IUNET identified as Italian partners	Named institutional structure in the CNR announcement	Coordination mechanism for implementation and technology transfer
FBK silicon-detector cleanroom	Trento/Povo; radiation sensors and integrated photonics	700 m²; 150 mm wafers; published minimum linewidth of 500 nm	Specialised research and fabrication capability
FBK MEMS/NEMS cleanroom	Flexible microfabrication	500 m²	Research infrastructure, not directly comparable with a logic-fab cleanroom
FBK packaging and 3D integration	Prototype assembly, wafer bonding, thinning and TSV-related integration	60 m² packaging area; 180 m² 3D-integration area	Existing integration competence; not evidence of large-scale commercial chiplet packaging
PoliFab	Milan; lithography, deposition, etching, characterisation and back-end work	Current resources page lists 330 m² ISO 6 plus 290 m² ISO 8; substrate handling up to 8 inches	Research, prototyping and industry collaboration

Sources: Home — Fondazione Chips-IT — undated; Linea Pilota per la microelettronica: siglato l’accordo per l’insediamento a Catania — CNR — May 2025; Cleanrooms — FBK Sensors and Devices — undated; Resources — PoliFab — undated. Fondazione Chips-IT

CNR’s announcement identifies the Italian component of the WBG project as exceeding €200 million, alongside the wider €360 million multinational programme. These figures describe different geographic scopes. The agreement and programme launch establish institutional and financial architecture; they do not, by themselves, demonstrate that every cleanroom, tool or process platform is commissioned and accessible to industrial users. Linea Pilota per la microelettronica: siglato l’accordo per l’insediamento a Catania — CNR — May 2025.

PoliFab’s published figures require similar version control. Its current resources page reports different areas and substrate capability from older university descriptions. The assessment uses the facility’s current resources page for the table, while recognising that substrate handling up to 8 inches does not establish that every process in its equipment set supports a complete 200 mm production flow. Resources — PoliFab — undated.

Materials, utilities and logistics: the less visible continuity layer

A semiconductor ecosystem also includes high-purity gases, chemicals, distribution systems, purification equipment and specialised replenishment services. Sapio explicitly offers gases and supply systems for silicon-semiconductor production. Air Liquide’s electronics documentation describes high-purity bulk-gas delivery, purification and online purity control. These records establish relevant supplier capabilities; they do not establish specific contracts with the Italian fabs mapped above. Semiconduttori in silicio — Sapio — undated; Bulk gases supply solutions — Air Liquide Electronics — undated. SAPIO INDUSTRIA

Continuity requirement	Evidence-backed capability or analytical requirement	Information needed for a resilience assessment
Electronic gases	Sapio documents semiconductor gas and supply-system services	Qualified products, production origin, stocks and alternative sources
Bulk-gas distribution	Air Liquide describes tanker delivery, storage, purification and purity monitoring	Site-specific delivery architecture and disruption recovery arrangements
Silicon materials movement	MEMC describes crystal transfers between Merano and other group locations	Allocation commitments, transport dependencies and replacement lead times
Equipment continuity	Italian equipment makers provide several specialised tool and test functions	Spare-part origin, software support, service availability and second-source qualification
Electricity and water	Production expansion requires dependable utilities	Site-level redundancy, outage tolerance, water treatment and recovery capacity

The policy question is whether the required input can reach the qualified process within its permitted interruption window. A supplier’s presence in Italy does not prove that its feedstock, purification stage, critical spare part or production software is domestically controlled. The corresponding intelligence requirement is a plant-level dependency register, including the location of upstream production and the time required to qualify replacements.

Geographic concentration and employment: substantial anchors, incomplete national totals

The evidence reveals complementary territorial concentrations. Lombardy combines manufacturing, test interfaces, design and research. Piedmont connects wafer materials, test and automation equipment, discrete devices and the proposed advanced-packaging investment. Sicily combines power-semiconductor manufacturing, research and design. Abruzzo retains specialty foundry activity and a separate Micron engineering presence. Trentino contributes materials and research infrastructure; Veneto and Campania contribute design and development.

Territorial concentration	Principal activities established here	Industrial implication
Lombardy	Agrate manufacturing; Technoprobe network; multinational design centres; Chips-IT; PoliFab; Castelletto R&D	Dense interaction between design, process development, testing and manufacturing
Piedmont	MEMC Novara; SPEA; Osai; Seica; Vishay Borgaro; planned Silicon Box	Opportunity to connect materials, automation and back-end capabilities
Sicily	ST Catania; CNR-IMM/WBG initiative; NXP R&D; Technoprobe location	Concentration in power electronics and associated engineering
Abruzzo	LFoundry Avezzano; Micron address in Avezzano	Separate foundry and engineering contributions that must not be conflated
Trentino-Alto Adige	MEMC Merano; FBK Trento	Materials production and specialised research infrastructure
Veneto	Infineon Padua	Product-development and engineering contribution
Campania	Micron Arzano	Memory-related engineering presence

This geography is an analytical grouping of the cited site records, rather than a statistical estimate of regional output.

Published employment figures demonstrate the scale of particular anchors, but their reporting dates and definitions do not support an audited national aggregate.

Site or organisation	Published workforce figure	Source and date basis	Permissible use
ST Agrate	5,300	Undated site profile accessed at the cut-off	Indicative site scale
ST Catania	5,500	Undated site profile accessed at the cut-off	Indicative site scale
LFoundry Avezzano	More than 1,300	Undated company profile	Company-reported employment scale
MEMC Novara	Approximately 800	Undated corporate description	Indicative workforce; not a separately identified FAB300 increment
MEMC Merano	Approximately 250	Same corporate description	Indicative workforce
Infineon Italy	More than 500	Undated Italian careers page	Organisation-level figure, not a fabrication workforce

Sources: Agrate, Italy — STMicroelectronics; Catania, Italy — STMicroelectronics; Company — LFoundry; Chi siamo — MEMC; Your career in Italy — Infineon. STMicroelectronics

Key judgments

The mapping supports three conclusions. Italy has interconnected strengths across materials, specialty fabrication and testing, rather than an isolated collection of investment announcements. Its manufacturing base is nevertheless concentrated in a limited number of major sites, making individual process transfers and investment decisions nationally consequential. Its multinational engineering presence adds technological depth, but the associated production capacity and allocation rights frequently sit outside Italy.

Confidence is high in the documented company functions and published specifications, moderate in undated workforce and nominal-capacity descriptions as indicators of present scale, and insufficient for a comprehensive national utilisation, employment or qualified-output total.

What would change the assessment

The assessment would strengthen if project and site disclosures established customer-qualified capacity, broader industrial access to pilot lines, stable production yields and demonstrable domestic supplier participation. It would weaken if restructuring removed process capabilities faster than replacements became qualified, or if announced expansions produced limited usable capacity for European customers.

Open official record

The outstanding records are current site-level production and employment returns; qualified process portfolios; semiconductor-specific equipment revenues; customer-access arrangements; and reconciled operating milestones for the new research and packaging infrastructure. These are necessary to convert a credible industrial map into an auditable national capability balance.

Chapter 2. Technology Focus Areas and Competitive Advantages

Italy’s technological advantage rests on the ability to convert specialised process knowledge into reliable devices and systems at competitive cost. In power electronics, analog integration, sensing and testing, the decisive metrics differ from those used to compare advanced digital processors. Breakdown voltage, conduction and switching losses, thermal performance, precision, reliability and qualification history can be more relevant than transistor density.

The assessment must consequently distinguish technological sophistication from dimensional scaling. A differentiated power or RF process can be commercially demanding without approaching leading-edge logic nodes; a 300 mm wafer platform can improve manufacturing economics without becoming a processor foundry; and advanced packaging can combine components produced at different nodes without eliminating dependence on their fabrication.

SiC: the competitive advantage depends on the complete conversion system

SiC’s attraction lies in its suitability for efficient power conversion under demanding voltage, frequency and temperature conditions. Its commercial value is realised through applications such as traction inverters, chargers, industrial drives and renewable-energy conversion, where semiconductor losses interact with cooling, passive components, packaging and operating requirements. ST’s technology documentation identifies these application families, while Infineon’s technical overview emphasises that the appropriate material depends on power and switching-frequency requirements. Silicon Carbide — STMicroelectronics — undated; Wide-Bandgap Semiconductors — Infineon — undated. STMicroelectronics

The industrial assessment should therefore avoid assuming that every electric vehicle, industrial converter or renewable installation generates an equivalent SiC opportunity. The relevant commercial question is whether a qualified SiC solution delivers a better total system outcome at the customer’s operating point. A higher device price can be justified by lower losses or reduced cooling requirements, but those gains depend on architecture, duty cycle and implementation.

Technology family	Principal decision variables	Italian capability relevant to the assessment	Analytical implication
Silicon power devices	Cost, established qualification, operating voltage, switching requirements	ST smart-power processes and discrete-device activity	Retain silicon where it meets system requirements economically
SiC power devices	Efficiency under demanding power-conversion conditions; device and module cost; reliability	Catania materials/device development and associated equipment/test capabilities	Evaluate system savings against the cost of qualified production
GaN power devices	High-frequency switching, integration, package parasitics and application voltage	Documented Italian research activity; ST’s stated manufacturing-development direction	Preserve development options without equating research with mature volume capacity
Mixed-material systems	Allocation of functions across Si, SiC and GaN	Analog control, drivers, sensing, power devices and test expertise	Support architectures that combine materials according to function

This comparison is qualitative. It does not assign universal voltage boundaries or rank materials independently of the application. The technical basis is Wide-Bandgap Semiconductors — Infineon — undated; the Italian development direction is described in Manufacturing strategic programs — STMicroelectronics — undated.

A significant advantage of the Italian ecosystem is the potential interaction between device design, epitaxy equipment, process development and test. Feedback from electrical failures can inform changes to material growth or fabrication; device redesign can reduce required die area; and improved test methods can prevent defective dies from entering expensive module assembly. The benefit is conditional on effective data exchange and process control. Co-location and corporate integration make that interaction possible, but neither establishes its measured economic return.

Larger wafers: a measurable geometric gain with conditional economic benefits

The transition from 150 to 200 mm SiC wafers creates a clear geometric advantage. Using nominal circular area, a 200 mm wafer has approximately 77.8% more surface area than a 150 mm wafer. This calculation excludes edge losses, die layout and defects; it cannot be presented as an equivalent increase in saleable chips or reduction in cost.

Nominal wafer diameter	Circular area, calculated	Area relative to 150 mm	Area relative to 200 mm
150 mm	17,671 mm²	1.000	0.563
200 mm	31,416 mm²	1.778	1.000
300 mm	70,686 mm²	4.000	2.250

Calculated using area = π × diameter² ÷ 4, rounded to the nearest square millimetre. The table compares geometry only; it does not imply interchangeable materials or manufacturing processes.

For otherwise comparable dies, the economic relationship can be expressed as:

Cost per qualified die = total wafer-processing cost ÷ number of qualified dies obtained.

The denominator depends on the usable surface, die size, process yield and qualification outcome. Larger diameter improves the available area, but additional material cost, immature processing or lower yield can offset that advantage during ramp-up. ST’s earlier 200 mm SiC development announcement explicitly identified equipment and supporting-ecosystem requirements alongside wafer quality, confirming that diameter expansion is a coordinated industrial transition. STMicroelectronics Manufactures First 200mm Silicon Carbide Wafers — STMicroelectronics — July 2021. ST News

Economic driver	Mechanism	Evidence required from an operating programme
Substrate quality	Defects can reduce usable device output	Defect distribution and device-yield correlation
Epitaxial consistency	Thickness and doping variations affect device behaviour	Uniformity maps and electrical results
Process maturity	New flows can require additional learning and rework	Yield progression, cycle time and scrap rates
Die-size reduction	More devices can fit within usable wafer area	Equivalent electrical performance and qualification
Test effectiveness	Earlier detection avoids downstream assembly costs	Escape rates, test time and module-yield effects
Utilisation	Fixed manufacturing costs are spread across actual production	Sustained loading and customer demand
Qualification	Technically functioning devices must satisfy customer requirements	Accepted products and approved production routes

The most defensible public-support metric is therefore the cost and availability of qualified output over time. Wafer diameter is an enabling variable, while production yield and customer acceptance determine whether that variable creates a lasting competitive advantage.

Device engineering: shrinking die area can matter as much as expanding wafer area

ST’s fourth-generation SiC announcement provides a concrete example of device-level improvement. The company reported an average die-size reduction of 12–15% relative to its third generation when compared at an on-resistance measured at 25°C. This is a specific manufacturer comparison; it should not be generalised across operating temperatures, products or total system cost. Nevertheless, it identifies an important competitive mechanism: device architecture can increase output per wafer independently of wafer diameter. STMicroelectronics unveils new generation of silicon carbide power technology tailored for next-generation EV traction inverters — STMicroelectronics — 2024. ST News

That announcement also distinguished completed qualification of the 750 V class from the then-expected qualification of the 1,200 V class. The distinction demonstrates why a technology generation should not be treated as universally qualified across its proposed product family. Each operating envelope, package and customer application requires its own evidence.

For Italy, the implication is that manufacturing investment should remain connected to device-development teams. A factory operating a process that is no longer competitive in die area, losses or robustness can lose economic ground despite high nominal capacity. Conversely, strong design and process integration can improve effective output without a proportional increase in buildings or equipment.

Reliability must remain a separate assessment dimension. The material properties of SiC do not remove gate-oxide, packaging or operating-stress constraints. NIST’s research establishes the importance of oxide reliability as a technical subject, but its historical experimental findings do not certify any present commercial product. Product assurance must come from the relevant contemporary qualification record. Oxide Reliability of SiC MOS Devices — NIST — 2008.

Test technology: an industrial advantage in detecting failure before value is added

Testing creates economic value through a combination of measurement accuracy, throughput, contact reliability and defect detection. These functions become particularly consequential when an individual defective die can cause rejection of a more expensive assembled module.

SPEA describes its known-good-die cells as performing electrical stress tests on unpackaged power devices, including high-voltage testing up to 3 kV. Its H7000-based configuration supports 6- and 8-inch wafers, with a stated thermal range from ambient temperature to 200°C. These specifications describe the manufacturer’s product capability; they do not establish a customer’s achieved throughput, process yield or lifetime reliability. SPEA elevates KGD testing with next-gen Integrated Test Cells powered by the new H7000 Handling Platform — SPEA — undated. SPEA

Test layer	Purpose	Italian capability documented here	Metric that establishes industrial effectiveness
Wafer contact/interface	Connect measurement equipment to individual devices	Technoprobe probe cards and MEMS contact technologies	Contact stability, maintenance requirements and measurement performance
Known-good-die screening	Reject defective unpackaged devices before assembly	SPEA integrated cells	Defect escapes, cost per tested die and accepted output
Device characterisation	Measure static and switching behaviour	Seica S20 IS³	Repeatability across relevant electrical conditions
Thermal and cycling assessment	Examine thermal resistance and repeated power stress	Seica S20 RTH	Correlation with the product’s thermal and reliability requirements
Handling and burn-in automation	Move, load and screen devices consistently	Osai systems	Handling damage, availability and throughput
Integration research	Develop assembly and interconnect processes	FBK fabrication and integration services	Repeatable process performance and successful industrial transfer

Sources: Our technologies — Technoprobe; Power Semiconductor Testers — Seica; Semiconductor — Osai; MNF Service — FBK. Technoprobe

The presence of several test-related firms should not be translated into an unsupported national market-share claim. Their strategic importance lies in particular technical functions and customer relationships. A credible benchmark would distinguish probe cards, complete testers, handlers, characterisation systems and inspection tools, then compare revenues or installed capacity within each defined segment.

Technoprobe’s research expenditure provides a useful financial illustration. Its H1 2026 statements report R&D expense of €27.251 million, compared with €26.913 million in H1 2025. Absolute expenditure increased by approximately 1.3%, calculated from those figures, while reported R&D intensity fell from 8.3% to 5.9% because revenue expanded faster. The ratio alone would therefore give a misleading impression of declining research commitment. These remain consolidated group figures rather than an allocation of spending to Italy. Half-Year Financial Report as of 30 June 2026 — Technoprobe — August 2026, research and development analysis.

Specialty analog and mixed-signal: process differentiation beyond the node number

BCD combines bipolar devices for analog functions, CMOS for digital processing and DMOS for power handling within a single process family. The industrial value derives from integrating functions that would otherwise require different components and interfaces. ST identifies power management, analog data acquisition and actuators among the application areas. BCD — STMicroelectronics — undated. STMicroelectronics

This specialisation is closely aligned with the needs of industrial equipment and vehicles: sensing, control, protection and power actuation must operate together under defined electrical and thermal conditions. A smaller digital feature is useful only where it improves the complete product; voltage handling, analog precision, isolation and reliability impose additional process requirements.

Capability	Source of differentiation	Appropriate benchmark
BCD/smart power	Integration of analog, digital and power functions	Performance, die area, voltage range and cost for the same application
Analog/mixed-signal	Precision and interaction between physical signals and digital control	Accuracy, noise, stability, power consumption and qualified product breadth
RF-SOI	Specialised radio-frequency device and isolation behaviour	RF performance, process availability and customer qualification
CMOS image sensors	Pixel and readout performance; specialised fabrication and backside processing	Sensor behaviour, yield and application qualification
MEMS	Integration of microfabricated structures with electronic interfaces	Sensitivity, stability, packaging and reproducibility

The Italian mapping supports participation in these categories through ST, Tower, LFoundry and the research network. It does not establish equivalent national strength in every category. In particular, Tower’s listed RF-SOI platform, ST’s BCD activities and LFoundry’s imaging processes should remain distinct capability entries.

For industrial policy, preserving these differentiated process families requires sustained design enablement and customer qualification. A fab’s nominal capacity is of limited use to an external designer without validated models, design rules, libraries and a viable route to production. The existence of a domestic process therefore needs to be matched with evidence that intended users can actually design into it.

Advanced packaging: integration capability must be specified by architecture

Advanced packaging is not a single interchangeable technology. Panel-level processing, wafer bonding, through-silicon interconnects and high-volume multi-die assembly impose different equipment, materials and design requirements. Italy’s existing research integration capabilities and Silicon Box’s proposed commercial offering occupy different positions along this spectrum.

FBK’s service documentation lists wafer-level bonding, TSV-related processing and other integration techniques. Silicon Box’s European project is described as panel-level packaging and testing of integrated dies or chiplets. Those records support an emerging combination of research and planned manufacturing capability, but do not establish domestic availability of every interconnect architecture or package required by advanced computing. MNF Service — FBK — undated; Open EU Foundry status granted to innovative chiplet facility — European Commission — March 2026.

Packaging requirement	Why it matters	Evidence required before claiming sovereignty improvement
Qualified package architecture	Determines which products can be manufactured	Accepted design rules, package families and customer products
Die availability	Packaging cannot proceed without constituent components	Supply agreements and qualified alternative dies
Interconnect performance	Controls electrical behaviour between components	Validated pitch, bandwidth and electrical characteristics
Thermal management	Combined devices concentrate heat	Package-level thermal measurements and approved operating limits
Materials continuity	Substrates, encapsulants and interconnect materials can constrain output	Qualified suppliers, origin and substitution time
Production yield	More complex assembly can destroy the value of otherwise functional dies	Yield by package family and failure-analysis capability
Test coverage	Individual-die testing does not establish assembled-system performance	Package and system-level test methodology
Customer access	Located capacity may be unavailable to intended European users	Commercial terms, allocation and continuity arrangements

These are analytical acceptance criteria, not claims that every requirement is currently met.

Italy should therefore evaluate packaging investments through the products they enable and the dependencies they remove. Capturing assembly value locally can be strategically worthwhile even when leading-edge dies remain imported, provided the resulting package is competitive and accessible. The associated dependency must remain visible in the assessment rather than disappearing behind the designation “advanced packaging”.

Design capability: expertise is present, but the complete industrial route remains incomplete

The Italian presence of multinational design teams and Chips-IT means that a general claim of “no design capability” would be incorrect. The more precise gap concerns the ability to control the complete route from architecture through implementation, fabrication, packaging and commercial deployment.

Chips-IT’s April 2025 announcement identifies its participation in a twelve-partner coordination team for the European chip-design platform, including responsibilities for access criteria, training, user support and incubation. The announced platform links commercial EDA tools, intellectual-property libraries and fabrication-related support. This establishes an institutional initiative to improve access; its announced onboarding timetable should not be treated as evidence of actual user adoption or completed silicon. Fondazione Chips-IT proud partner of the coordination team of the EU Chips Design Platform — Fondazione Chips-IT — April 2025.

Design-chain element	Italian capability established here	Residual gap or dependency
Architecture and circuit design	Corporate and research teams across several locations	Decision rights and product ownership vary by organisation
Process models and design rules	Available for identified specialty platforms	Access remains process-specific
EDA and design IP	European platform initiative addresses access	Access to tools is distinct from control of their development and licensing
Prototype fabrication	Specialty foundries and research facilities provide routes for selected technologies	No universal domestic route across all process classes
Advanced digital implementation	Engineering expertise may participate in international projects	No verified Italian commercial leading-edge logic foundry was identified in this assessment
Packaging and validation	Existing specialised capabilities and planned expansion	Architecture-specific qualification and production access remain necessary
Commercial scale-up	Established firms demonstrate industrial delivery in selected segments	Start-up access, financing and repeatable manufacturing pathways require separate evidence

ST’s own manufacturing strategy confirms that an integrated European manufacturer still relies on external foundry and packaging partnerships for selected technologies. It names TSMC, Samsung Foundries, GlobalFoundries, ASE and Amkor among examples. This is evidence of a deliberately international production model, and clarifies why domestic strength in one segment does not establish independence across the complete product stack. Manufacturing strategic programs — STMicroelectronics — undated. STMicroelectronics

Technology priorities: preserve differentiated capability and close specific missing links

The evidence supports targeted priorities whose results can be observed. In SiC, the decisive objective is competitive qualified output, linking materials, devices, modules and customer acceptance. In test, it is retention of specialised measurement and interface technologies combined with international commercial access. In analog and mixed-signal, it is continued improvement of differentiated processes and usable design platforms. In packaging, it is successful qualification of commercially relevant architectures.

Priority	Expected industrial effect	Evidence of progress	Main implementation risk
Improve SiC yield and process control	Reduce cost per qualified device	Sustained yield improvement and customer-approved output	Capacity expansion outpaces process maturity
Retain specialised test and interface engineering	Support demanding devices and reduce downstream defects	Qualified products, customer retention and lower test cost	Treating equipment sales growth as proof of complete technological control
Strengthen specialty process access	Enable more firms to use available manufacturing platforms	Successful tape-outs and qualified production transfers	Tools and design support fail to translate into manufactured products
Develop packaging design and qualification competence	Connect package engineering to commercial manufacture	Accepted package families and multiple industrial customers	Investment creates nominal capacity with insufficient qualified demand
Transfer research processes into industry	Convert laboratory results into repeatable production	Documented process adoption and validated models	Pilot-line activity remains disconnected from production requirements
Reconcile critical materials and tool dependencies	Improve recovery from interruption	Qualified alternatives and tested continuity arrangements	Geographic relocation leaves upstream dependencies unchanged

These priorities are analytical recommendations. Their financing, competent authorities and implementation instruments belong to the subsequent industrial-policy assessment.

Key judgments

Italy’s strongest technological position lies where device physics, specialised manufacturing and application engineering reinforce one another. SiC, smart power, test interfaces and selected production equipment meet that description, while advanced packaging presents a significant but execution-dependent opportunity.

The principal gaps are specific: commercially available leading-edge logic fabrication; control over important design tools and intellectual-property inputs; architecture-specific packaging maturity; and assured access to qualified materials and complementary dies. Their existence does not negate Italian strengths, but limits the range of disruptions that domestic investment alone can resolve.

Confidence is high in the documented technology offerings and the wafer-area calculations, moderate in the assessment of their combined competitive advantage, and insufficient for a defensible numerical estimate of Italian segment market shares, current SiC unit costs or production yields.

What would change the assessment

The strongest positive evidence would be sustained reductions in cost per qualified device, industrial use of shared design and pilot-line services, qualified commercial packaging products and demonstrated substitution of critical external inputs. The assessment would deteriorate if process yields, customer qualification or manufacturing access failed to keep pace with investment.

Open official record

The priority technical records are process-specific yield curves; cost and utilisation data; product-generation qualification matrices; package design and test specifications; industrial adoption of research outputs; and current design-platform usage, tape-out and production-conversion results. Those records would establish whether Italy’s identifiable technical strengths are becoming broader, durable industrial autonomy.

---

Pillar II — European Position and Global Competitive Structure

Chapter 3. European Comparison

Italy occupies an important position within European semiconductor manufacturing, but its competitive standing varies substantially across the value chain. Its strongest contribution is concentrated in power technologies, specialty processes, materials and testing, whereas Germany combines a broader manufacturing cluster with substantial automotive demand, France connects process research with differentiated fabrication and engineered substrates, the Netherlands controls internationally important equipment capabilities, Ireland hosts advanced logic manufacturing, and Austria integrates power-semiconductor research with production. These positions are complementary in several respects, but they also compete for investment, engineering talent, customers and public support.

The central policy question is therefore how Italy’s capabilities fit into an industrial system whose strongest assets are distributed across national boundaries and corporate networks. A European fabrication plant can improve geographic resilience without transferring control of process technology to European shareholders; a European equipment manufacturer can exercise substantial technological influence while selling most of its output to overseas fabs; and a research infrastructure can shape future process generations without providing commercially available manufacturing capacity.

A common basis for comparing European semiconductor nations

A defensible comparison requires separate treatment of production location, corporate control, technological capability and access to output. These dimensions are frequently collapsed in political descriptions of semiconductor investment, although they answer different strategic questions.

Comparison dimension	Relevant measurement	What it establishes	What it does not establish
Manufacturing location	Qualified capacity physically installed within a country	Geographic production capability	Domestic ownership of technology or priority access to output
Corporate headquarters	Location of the parent company and principal management	Corporate nationality under the selected statistical convention	Location of fabrication, packaging or upstream suppliers
Ownership and control	Equity, voting rights, operating agreements and investment authority	Who can direct investment and corporate decisions	Complete freedom from external technology or licensing dependencies
Process capability	Qualified process platform, materials, design rules and product applications	Which devices a site can manufacture	Interchangeability with another process carrying a similar node label
Installed capacity	Wafer starts under a defined diameter and period	Nominal production scale	Realised output, utilisation or yield
Commercial availability	Customer qualification and accessible production allocation	Whether intended users can manufacture products	Guaranteed supply during every disruption
Research intensity	Defined R&D expenditure divided by a compatible revenue denominator	Research commitment within the reporting perimeter	National research intensity when the figures concern multinational groups
Public support	Approved aid, contractual commitments and actual disbursements	Different stages of government financial involvement	Completed investment or operational capability
Supply-chain coverage	Qualified materials, tools, services and back-end routes	Completeness of the production pathway	Independence from every foreign supplier

These distinctions are applied throughout the country assessment. They also explain why a single league table of national “semiconductor strength” would provide less decision value than comparisons by industrial function.

European country comparison: different forms of industrial strength

Country	Principal position within the European system	Manufacturing and technology evidence	Ownership and control distinction	Competitive relationship with Italy
Italy	Power devices, specialty fabrication, silicon materials, test interfaces and equipment; emerging packaging	Established manufacturing and the process transitions assessed in Pillar I	Capabilities distributed across European and non-European corporate groups	Can deepen specialised supply-chain roles while seeking broader access to complementary technologies
Germany	Dense manufacturing cluster serving automotive, industrial and differentiated logic applications	Infineon’s new Dresden Smart Power Fab opened in July 2026; ESMC and GlobalFoundries add separate development programmes	German-owned manufacturers coexist with US-headquartered and Taiwanese-controlled foundry operations	Strong complementarity in industrial supply chains; direct competition in power, analog investment and engineering talent
France	FD-SOI, digital and photonics-related manufacturing, engineered substrates and process research	Crolles manufacturing ecosystem; CEA-Leti/FAMES research infrastructure	Franco-Italian, US and French corporate capabilities interact	Particularly important complementarity with Italian smart-power and SiC specialisations
Netherlands	Lithography, deposition equipment and internationally distributed semiconductor businesses	ASML’s equipment business and NXP’s participation in manufacturing partnerships	Dutch corporate strength does not mean that all associated production is located in the Netherlands	Essential equipment and technology partner; competition for research investment and specialist personnel
Ireland	Advanced logic manufacturing within Intel’s production network	Fab 34 produces Intel 4 and Intel 3; additional investment announced in July 2026	Manufacturing is European-located and US-controlled	Provides a different capability from Italian specialty and power fabrication
Austria	Power-semiconductor research and manufacturing; optoelectronic sensors	Infineon Villach and ams OSRAM Premstätten	Austrian operations are embedded in multinational groups with wider production networks	Close technological competition and collaboration in power devices, sensors and research
United Kingdom	Design, processor IP, compound semiconductors and specialist manufacturing	Government sector study identifies a diversified ecosystem rather than a single dominant fabrication model	UK-headquartered and internationally controlled firms coexist	Partner in design and compound technologies; competitor for investment, talent and customers
EU-27 collectively	Distributed equipment, research, materials and specialty-manufacturing strengths	Advanced manufacturing exists, but capabilities and access are uneven across segments	EU location, European corporate ownership and technology control remain separate	Italy’s contribution depends on effective connections to this distributed industrial base

The country classifications are supported by the site and programme records examined below. The principal new manufacturing evidence includes An impulse for Germany, Europe and the world — Infineon — July 2026, Intel Invests €5 Billion to Expand Manufacturing in Europe — Intel — July 2026, and FAMES, une ligne pilote stratégique au service de la souveraineté technologique européenne — CEA — January 2026. Infineon Technologies

Germany: substantial manufacturing depth, with sharply different project outcomes

Germany’s position is strengthened by the interaction between manufacturers, equipment suppliers, research institutions and industrial customers. However, its investment pipeline cannot be assessed by retaining every project announced during the post-shortage investment cycle.

Intel stated in July 2025 that it would no longer proceed with the planned German and Polish projects. Those projects must therefore be removed from an operating-capacity forecast unless a subsequent admissible record establishes a replacement commitment. Their previously announced investment values are not part of the executable European manufacturing baseline. Intel Reports Second-Quarter 2025 Financial Results — Intel — July 2025.

Infineon’s Dresden programme represents a different outcome. The company reported opening its €5 billion Smart Power Fab on 2 July 2026, with 1,000 direct jobs associated with the investment. Its connection with Villach is intended to accelerate process and product qualification through the “One Virtual Fab” approach. Opening establishes a material execution milestone, while the speed and extent of subsequent production ramp-up remain separate questions. An impulse for Germany, Europe and the world — Infineon — July 2026. intc.com

ESMC adds a third model: European manufacturing based on TSMC technology and operating expertise, supported by minority participation from Bosch, Infineon and NXP. The announced ownership structure is 70% TSMC and 10% for each European partner. Its planned processes—28/22 nm planar CMOS and 16/12 nm FinFET—address a different industrial requirement from the most advanced processor nodes.

German programme	Investment or capacity parameter	Latest verified milestone used here	Capacity treatment
Infineon Smart Power Fab, Dresden	€5bn investment; 1,000 direct jobs associated with the programme	Opening reported in July 2026	Opened facility; full qualified output must be established separately
ESMC, Dresden	More than €10bn total investment; 40,000 300 mm wafers/month at full operation	Groundbreaking documented in August 2024	Planned capacity; production start originally targeted for end-2027
GlobalFoundries SPRINT, Dresden	€1.1bn expansion; original objective of more than one million wafers/year by end-2028	Topping-out reported on 9 October 2026	Construction milestone; not production completion
Intel German project	Earlier investment proposal superseded by withdrawal	Company stated in July 2025 that it would not proceed	Excluded from executable capacity
Intel Polish assembly/test project	Earlier proposal superseded by withdrawal	Same July 2025 statement	Excluded from executable capacity

Sources: ESMC Breaks Ground on Dresden Fab — NXP/TSMC — August 2024; TSMC, Bosch, Infineon, and NXP Establish Joint Venture — TSMC — August 2023; GlobalFoundries Plans Billion-Euro Investment to Expand Chip Manufacturing in Germany — GlobalFoundries — October 2025; GlobalFoundries marks Dresden expansion milestone — GlobalFoundries — October 2026.

The distinction between GlobalFoundries’ topping-out ceremony and completed production is particularly important. Its October 2026 announcement establishes progress in construction and a future technology roadmap; it does not establish that the additional qualified output is already available. Describing the expansion as completed manufacturing capacity would materially overstate the European supply position. GlobalFoundries

For Italy, Germany creates both demand and competitive pressure. Additional European foundry capacity can support industrial customers and provide alternative manufacturing routes, but those benefits are process-specific. ESMC’s FinFET processes do not substitute directly for SiC power devices, while Infineon’s power and analog capabilities compete more directly with parts of the Italian portfolio.

France: the importance of connecting research, process technology and manufacturing

France’s comparative advantage is particularly visible in the relationship between Grenoble-area research and differentiated manufacturing. The Crolles programme was announced around FD-SOI and related technologies, combining ST and GlobalFoundries capabilities rather than attempting to reproduce every category of semiconductor production.

The original 2022 announcement specified up to 620,000 300 mm wafers annually at full build-out, with approximately 42% associated with ST and 58% with GlobalFoundries. It initially targeted full capacity in 2026; the Commission’s 2023 account referred to full operation by 2027. These are historical programme vintages, not evidence that either target had been fully achieved by the present cut-off. STMicroelectronics and GlobalFoundries to advance FD-SOI ecosystem with new 300mm manufacturing facility in France — GlobalFoundries — July 2022; La Commission autorise une mesure française visant à aider STMicroelectronics et GlobalFoundries — European Commission Representation in France — April 2023.

The capacity figure corresponds to approximately 51,667 wafers per month, calculated by dividing the annual design parameter by twelve. That conversion makes the period comparable with other announcements, but does not reconcile different processes, product mixes, utilisation or production yields.

France also strengthens the European technology pipeline through FAMES. CEA’s January 2026 account identifies an €830 million programme, including €730 million for French partners, bringing together 11 partners in eight countries. Its focus includes advanced FD-SOI, embedded non-volatile memories, 3D integration, RF passive components and power-management passives. CEA explicitly distinguishes the pilot line’s maturation and transfer role from a production fab. FAMES, une ligne pilote stratégique au service de la souveraineté technologique européenne — CEA — January 2026. GlobalFoundries Inc.

The implication for Italy is substantive: collaboration with France can connect Italian power and mixed-signal expertise to additional digital, substrate and integration technologies. However, research participation and corporate links do not automatically provide reserved production capacity. The commercially useful connection requires compatible process design kits, transferable designs, qualification support and a viable manufacturing agreement.

The Netherlands: equipment influence exceeds its domestic fabrication footprint

The Netherlands demonstrates why semiconductor influence cannot be measured solely through wafer output. ASML reported €32.7 billion in 2025 net sales and €4.7 billion in R&D under its US GAAP presentation. The resulting R&D-to-sales ratio is approximately 14.4%, calculated from the rounded published values. These are multinational corporate figures, not measurements of Dutch domestic production or national semiconductor R&D. 2025 Annual Report — ASML — 2026.

ASML’s EUV technology gives the European ecosystem a particularly important position in advanced manufacturing equipment. Yet the system itself emerged through sustained integration of international suppliers and specialised technologies; the company’s account includes the acquisition of US-based Cymer to accelerate light-source development. European control of a critical equipment supplier therefore creates influence within an international production system, rather than complete upstream independence. EUV lithography systems — ASML — undated. ASML – Supplying the semiconductor industry

For Italy, Dutch equipment capabilities are essential complements to domestic process development. The strategic objective should be dependable access, service continuity and participation in equipment-development networks. Attempting to replicate complete equipment ecosystems would require a different scale of investment, customer support and accumulated process knowledge from the expansion of selected Italian specialisations.

NXP’s ESMC participation further illustrates the distinction between headquarters and manufacturing geography: a Dutch-headquartered company can strengthen its production position through a German-located, Taiwanese-operated joint venture. National comparisons that assign the whole investment to one headquarters jurisdiction would conceal this distribution of industrial functions.

Ireland: advanced logic manufacturing exists within Europe

Ireland is an essential corrective to blanket statements that Europe has no advanced logic manufacturing. Intel identifies Fab 34 as producing Intel 4 and Intel 3, supported by high-volume EUV manufacturing. These are Intel process names; they should not be treated as literal dimensions or automatically equated with competitors’ similarly numbered nodes. Running On Four Decades of Leading-Edge Chip Manufacturing in Europe — Intel — undated.

In July 2026, Intel announced a further €5 billion investment at Leixlip, involving upgrades and equipment installation within existing facilities to expand output associated with Intel 3 products. The company stated that execution had begun earlier that year. This is a new investment programme supporting an existing manufacturing base, rather than evidence that the entire additional capacity was already installed and qualified. Intel Invests €5 Billion to Expand Manufacturing in Europe — Intel — July 2026.

The ownership position also changed. Intel’s Q2 2026 filing records the $14.2 billion repurchase of Apollo’s 49% interest in the Fab 34-related joint venture, with Intel owning 100% of Ireland SCIP by June 2026. This transaction concerns ownership and financing; it must not be added to fab construction expenditure as though it created an equivalent amount of new production equipment. Quarterly report, Semiconductor Co-Investment Program Ireland SCIP — Intel — Q2 2026. intel.de

Ireland’s advantage is consequently advanced manufacturing within a major US technology network. Its limitation, from a European autonomy perspective, is that physical location does not establish European control of the process roadmap, product allocation or the broader manufacturing stack.

Austria: research-intensive power manufacturing and differentiated sensors

Austria offers a particularly relevant comparator for Italy because of its concentration in power electronics and the integration of research with production.

Infineon Austria reported FY2025 revenue of €4.695 billion, R&D expenditure of €721 million, investment of €245 million, and 5,787 employees, including 2,506 in R&D. Calculated from these figures, R&D expenditure represented approximately 15.4% of revenue, and R&D personnel approximately 43.3% of the workforce. The reporting perimeter is Infineon Austria, not the Austrian semiconductor sector as a whole. Infineon Austria 2025: Innovation and efficiency — Infineon — December 2025.

These figures indicate a deeply integrated research-production model, but not immunity from the cycle. The same disclosure reported a €48 million loss, affected by vacancy costs and pricing and currency developments. Technological depth and research intensity can therefore coexist with substantial pressure on manufacturing economics.

ams OSRAM’s Premstätten programme provides a separate sensor-oriented example. Its February 2025 announcement described €567 million of investment by 2030, supported by an approved Austrian grant of up to €227 million, with 1,800 m² of additional cleanroom area. The programme combines CMOS, optical filters and through-silicon vias. ams OSRAM receives EU Commission approval for an investment grant up to €227 million — ams OSRAM — February 2025. Infineon Technologies

Austrian indicator	Reported value	Reference perimeter	Interpretation
Infineon Austria revenue	€4.695bn	FY ended September 2025	Corporate subgroup revenue
R&D expenditure	€721m	Same perimeter and year	Research commitment
R&D intensity	Approximately 15.4%	Calculated: 721 ÷ 4,695	Compatible within-company ratio
Total investment	€245m	Same year	Separate from R&D expenditure
Workforce	5,787	September 2025	Corporate subgroup employment
R&D workforce	2,506	Same date	Approximately 43.3% of total
ams OSRAM programme investment	€567m	Announced programme through 2030	Future cumulative investment
Approved grant ceiling	Up to €227m	Austrian state aid	Authorisation, not proof of disbursement

For Italy, the relevant comparison is the strength of the link between scientific work, process development and commercially qualified production. Matching individual expenditure figures would not reproduce that link; the assessment must examine technology transfer, engineering retention and the pace at which research improvements reach manufactured products.

United Kingdom: a separate design and compound-semiconductor strategy

The United Kingdom requires separate treatment because its policy framework, corporate mix and relationship with EU instruments differ from those of member states.

The 2026 government sector study identified 703 semiconductor-related companies, comprising 295 dedicated and 408 diversified businesses. It estimated dedicated-sector revenue of £10.6 billion, GVA of £7.5 billion, and approximately 16,350 direct jobs. These are study estimates with classification and coverage changes, rather than a manufacturing census directly comparable with Italian site employment. The report’s like-for-like revenue comparison was £9.6 billion to £10.3 billion; the £10.6 billion figure additionally incorporates newly identified firms. Semiconductor sector study 2026 — Department for Science, Innovation and Technology — 2026. GOV.UK

UK measure	Published estimate	Comparison constraint
Semiconductor-related companies	703	Includes dedicated and diversified businesses
Dedicated companies	295	Sector-specific definition
Diversified companies	408	Semiconductor activity forms only part of the business
Dedicated-sector revenue	£10.6bn	Expanded coverage
Like-for-like revenue	£10.3bn	More appropriate for comparison with the earlier £9.6bn baseline
Dedicated-sector GVA	£7.5bn	Modelled estimate
Direct employment	Approximately 16,350	Not a fabrication-only workforce

The UK’s 2023 strategy prioritised design and intellectual property, compound semiconductors and R&D, with up to £1 billion over a decade, including up to £200 million for 2023–2025. These are policy commitments from that strategy, not evidence of cumulative expenditure by October 2026. National semiconductor strategy — UK Government — May 2023.

The government’s March 2025 account of Vishay’s intended £250 million Newport investment adds an industrial counterpart focused on SiC manufacturing. It establishes the investment intention and government support context, but not completed delivery of the proposed production capability. Hundreds of millions of pounds to turbocharge manufacturing sector in Wales — HM Treasury — March 2025.

Italy should view the UK as both a potential technology partner and a competitor in selected functions. Design, compound materials and specialist manufacturing create possible connections; the effectiveness of those connections depends on commercial access, research arrangements and qualification pathways rather than geographic proximity alone.

Research infrastructure: Europe’s strength is distributed beyond the largest manufacturing states

Belgium is indispensable to an EU-27 assessment even though it was not among the six principal national comparators. Imec’s NanoIC infrastructure provides a research pathway into technologies beyond 2 nm and advanced integration.

Imec reported inaugurating a 2,000 m² cleanroom extension in February 2026, within a broader infrastructure exceeding 12,000 m². Its announcement anticipated more than 100 additional tools across the participating network over the following five years. These figures describe research infrastructure and deployment plans, not commercial foundry capacity. Imec inaugurates NanoIC pilot line, accelerating innovation in sub-2nm systems-on-chip — imec — February 2026. imec

European research function	Infrastructure or programme	Relevant distinction
Beyond-2 nm logic and integration	NanoIC, coordinated by imec	Research access and process development are distinct from volume manufacturing
FD-SOI and associated integration	FAMES, coordinated by CEA	Near-industrial maturation and qualification support
Power and wide-bandgap technologies	Italian-coordinated WBG initiative assessed in Pillar I	Complements advanced digital research
Industrial transfer	Shared design rules, models, prototypes and qualified process transfers	Determines whether research becomes commercially usable
Manufacturing deployment	Customer-qualified production at industrial sites	Must be measured separately from pilot-line expenditure

The strategic opportunity for Italy is participation in a European portfolio of research and manufacturing capabilities. The risk is fragmentation: excellent research programmes can remain disconnected from scale-up finance, customers or production access. The appropriate performance indicators are successful process transfers, accepted designs and repeatable commercial manufacture.

Public support: approved aid is not equivalent to EU budget absorption

A significant portion of semiconductor support is national expenditure authorised under EU state-aid rules. It should not be described as a centrally allocated Chips Act grant received from Brussels.

Selected programme	Public-support figure established in the record	Financing interpretation	Relevant source
ESMC, Germany	€5bn German measure	Approved national state aid	NXP/TSMC groundbreaking announcement, August 2024
ST/GF Crolles, France	Approximately €2.9bn French support	Combined project support; company allocations described as confidential	GlobalFoundries FY2023 Form 20-F
ST Catania, Italy	Approximately €2bn Italian support in the programme announcement	National support within the Chips Act framework	ST investment announcement, May 2024
Silicon Box Novara, Italy	Approximately €1.3bn Italian aid approval	National state-aid measure	Silicon Box’s response to Commission approval
ams OSRAM Premstätten, Austria	Up to €227m Austrian grant	Approved aid ceiling	Company announcement, February 2025

Sources: ESMC Breaks Ground on Dresden Fab — NXP/TSMC — August 2024; Annual Report, state support for Crolles — GlobalFoundries — FY2023; Catania investment announcement — STMicroelectronics — May 2024; Silicon Box Newsroom, response to Italian state-aid approval — Silicon Box — December 2024; European Chips Act grant announcement — ams OSRAM — February 2025. NXP Semiconductors

This is a selected comparison, not a complete national funding ranking. It excludes other research awards, tax measures, loans and infrastructure expenditure, and it does not establish the amount disbursed.

The European Court of Auditors identified approximately €4.5 billion under Commission responsibility, directly or through the Chips Joint Undertaking, within a much broader estimated financing architecture. Its analysis also found incomplete information on disbursements across relevant funding streams. Consequently, Italy’s “share of Chips Act funding” cannot be calculated defensibly by dividing a small set of Italian investment announcements by the political headline envelope. Special Report 12/2025 — European Court of Auditors — 2025, paragraphs 39–44. The EU’s strategy for microchips

Italy’s contribution to the EU target: additional value, not additive headline expenditure

Italy can increase European value capture through specialised manufacturing, materials and testing, but the contribution to an aggregate revenue-share target depends on what happens elsewhere in the market. Strong growth in memory and advanced computing can expand the denominator faster than European specialty segments, even where European production itself increases.

This makes the following distinctions essential.

Outcome	Possible effect on resilience	Possible effect on aggregate market share
More qualified European power-device production	Improves availability for selected industrial applications	Depends on growth relative to the global market
Additional European packaging	Retains integration value and may shorten some supply routes	Does not automatically capture the value of imported constituent dies
Greater equipment exports	Strengthens European corporate revenue and technological influence	Must not be confused with European chip production
More advanced logic manufactured in Ireland	Improves geographic diversification	Corporate-control implications differ from manufacturing-location effects
Shared research infrastructure	Supports future capability	Does not immediately constitute saleable output
Qualified alternative manufacturing routes	Improves recovery from disruption	May provide strategic benefit without a large revenue increase

The relevant Italian objective is to expand competitive capabilities that European customers can use and sustain. Market share remains useful, but it should sit alongside measures of critical-product availability, qualification, recovery time and control over technology.

Key judgments

Italy’s position is strongest when evaluated as part of a differentiated European production system. Germany offers greater cluster breadth; France provides important process-research and manufacturing connections; the Netherlands contributes equipment influence; Ireland supplies advanced logic manufacturing; Austria demonstrates research-intensive power production; and the UK offers a separate design and compound-semiconductor ecosystem.

Confidence is high in the documented project milestones and financial disclosures, moderate in comparisons of their strategic effects, and insufficient for an audited ranking of national qualified wafer output or actual semiconductor-support absorption.

What would change the assessment

The European position would improve materially with qualified production at new facilities, effective external-customer access, successful research transfers and commercially sustainable utilisation. Further cancellations, prolonged underutilisation or production platforms that fail to attract qualified demand would weaken the expected return from the investment cycle.

Open official record

The priority missing records are comparable national capacity inventories, process-specific utilisation, aid disbursement schedules, current project qualification status and customer-access provisions. These would permit a stronger distinction between European industrial presence and European industrial control.

Chapter 4. Global Competitive Positioning

Italy competes within an international semiconductor system whose leadership is distributed across different commercial models. Taiwan combines large-scale foundry manufacturing with advanced process and packaging development; South Korea links memory scale with advanced logic; the United States combines chip design, software and equipment influence with manufacturing; China is expanding its production base and domestic customer ecosystem; Japan retains important materials and equipment capabilities while rebuilding advanced manufacturing; and Singapore attracts internationally controlled fabrication and packaging operations.

The principal European weakness is the incomplete connection between its strong individual capabilities and the full production route required for advanced systems. Italy can hold valuable positions within that system without reproducing every segment, but it remains exposed where an unavailable processor, memory device, material, tool or package can interrupt the delivery of an otherwise European product.

The market denominator is changing rapidly

WSTS’s Spring 2026 publication provides a coherent vintage for comparing product categories. It revises the 2025 world market to $795.640 billion and forecasts $1,511.248 billion in 2026 and $1,913.683 billion in 2027. These forecasts are not realised sales.

Product category	2025 reported/revised baseline, $bn	2026 forecast, $bn	2027 forecast, $bn
Total semiconductors	795.640	1,511.248	1,913.683
Logic	299.547	411.371	522.820
Memory	230.042	803.941	1,062.085
Analog	86.519	95.358	101.662
Micro	84.867	101.655	121.966
Discrete semiconductors	30.728	33.188	35.712

Source: Global Semiconductor Market Surges Beyond USD 1.5 Trillion in 2026 — WSTS — June 2026, forecast summary. wsts.org

The earlier February 2026 SIA release reported $791.7 billion for 2025. The difference is retained as a vintage difference; the two figures are not averaged or silently substituted. Global Annual Semiconductor Sales Increase 25.6% to $791.7 Billion in 2025 — SIA — February 2026.

The strategic implication is that nominal revenue share can move substantially with product mix and pricing. A memory-led market expansion can reduce the relative weight of European specialty suppliers without implying a corresponding loss of physical European manufacturing capacity.

Headquarters-based sales shares are not manufacturing shares

The SIA 2025 Factbook assigns the following shares for 2024 according to company-headquarters location.

Headquarters jurisdiction	Share in the SIA 2024 supplier-sales framework
United States	50.4%
South Korea	21.1%
European Union	9.2%
Japan	8.2%
Taiwan	6.5%
China	4.5%

Source: 2025 Factbook — Semiconductor Industry Association — 2025, “Regional share of semiconductor shipments by company HQ location”. These are historical supplier-sales shares, not current installed capacity, foundry-service shares or a measure of the location of every manufacturing stage. semiconductors.org

Taiwan’s figure must therefore not be interpreted as its share of wafer-foundry manufacturing. The accounting frameworks answer different questions, and adding foundry-service revenue to downstream chip sales would require explicit reconciliation to avoid double counting.

Taiwan: advanced foundry scale and specialty breadth

TSMC’s 2025 disclosures establish the scale of the manufacturing system against which European foundry ambitions must be assessed. The company reported $122.42 billion revenue, 15.0 million 300 mm-equivalent wafers shipped, and annual capacity exceeding 17 million 300 mm-equivalent wafers. It also reported high-volume manufacturing of its 2 nm technology beginning in Q4 2025.

TSMC indicator	2025 disclosure	Interpretation
Consolidated revenue	$122.42bn	Company revenue, not total Taiwanese semiconductor revenue
Wafer shipments	15.0m 300 mm-equivalent wafers	Annual shipments
Annual capacity	More than 17m 300 mm-equivalent wafers	Capacity, not realised output
Advanced-process revenue mix	74% from 7 nm and more advanced technologies	Internal wafer-revenue mix
3 nm revenue mix	24%	Internal wafer-revenue mix
Customer breadth	534 customers	Company-reported
Process breadth	305 technologies	Not 305 interchangeable manufacturing platforms

Source: 2025 Annual Report — TSMC — 2026. investor.tsmc.com

The strategic advantage arises from the interaction of process development, customer demand, manufacturing learning and integration services. An individual new fab cannot reproduce that accumulated system through capital expenditure alone.

UMC demonstrates Taiwan’s additional strength outside the most advanced nodes. Its Q4 2025 disclosure reported 36% of revenue from 22/28 nm, 78% capacity utilisation, and quarterly revenue of NT$61.81 billion. These figures show substantial commercial depth in processes directly relevant to many industrial and connectivity products, while also showing that established foundries remain exposed to utilisation and demand conditions. UMC Reports Fourth Quarter 2025 Results — UMC, SEC-filed release — January 2026.

For Italy, the Taiwanese comparison has two dimensions. TSMC defines a much larger advanced-logic production and integration system; UMC represents competition and potential supply in specialty processes. Italian and European strategies must address both, rather than treating Taiwan exclusively as a source of the most advanced processors.

South Korea: memory concentration changes the competitive balance

South Korea’s position combines advanced logic manufacturing with large memory businesses. Samsung reported that its foundry business began mass production of first-generation 2 nm products in Q4 2025. Its broader group revenue must not be used as semiconductor revenue, because the company also manufactures phones, displays and other products. Samsung Electronics Announces Fourth Quarter and FY 2025 Results — Samsung — January 2026.

Samsung’s FY2025 business disclosure estimates its DRAM revenue share at 34.0%, compared with 41.5% for 2024, drawing on DRAMeXchange data and identifying the 2025 annual figure as its own estimate. This is a useful benchmark, but it remains an attributed company disclosure rather than an independently reproduced market calculation. FY2025 business disclosure, DRAM market-share table — Samsung Electronics — 2026.

SK hynix reported preliminary FY2025 revenue of KRW97.1467 trillion, operating profit of KRW47.2063 trillion, and an operating margin of approximately 49%, identifying AI memory and HBM among the principal drivers. SK hynix Announces FY25 Financial Results — SK hynix — January 2026. Samsung Global Newsroom

Korean capability	Evidence	European exposure
DRAM	Samsung’s attributed 34.0% FY2025 revenue-share estimate	Reliance on qualified external memory supply
HBM and high-value memory	SK hynix’s reported earnings and product emphasis	Advanced computing requires access to specific qualified memory generations
Advanced logic	Samsung’s reported 2 nm production start	Additional manufacturing route, subject to customer and process qualification
Integration of logic, memory and packaging	Samsung’s stated strategic direction	European capabilities must connect to the required combinations of dies and packages

Italy has memory-development expertise, as established in Pillar I, but that does not substitute for high-volume memory manufacturing. Advanced packaging can retain additional value in Europe while leaving the availability of memory dies dependent on external producers.

United States: design influence, manufacturing and internationally distributed control

US strength extends beyond fabrication to processor architecture, chip design, software ecosystems and production equipment. The headquarters-based sales share above indicates the commercial weight of US suppliers, while their manufacturing routes can extend through Taiwan, South Korea, Europe and Southeast Asia.

GlobalFoundries illustrates why headquarters nationality and production geography must remain separate. Its FY2025 revenue was $6.791 billion, while its manufacturing network spans the United States, Germany and Singapore. Its November 2025 acquisition of Singapore-based Advanced Micro Foundry also demonstrates the international consolidation of silicon-photonics capabilities. GlobalFoundries Reports Fourth Quarter 2025 and Fiscal Year 2025 Financial Results — GlobalFoundries — February 2026.

Intel provides a different model, combining products, process development and fabrication. Its contrasting decisions in Ireland, Germany and Poland show that political announcements do not remove the requirement for commercial and financial discipline. Europe can host important US-controlled manufacturing while remaining exposed to investment decisions taken within a wider corporate portfolio.

US-related capability	Strategic relevance to Italy and Europe	Appropriate resilience response
Processor and accelerator design	Determines access to computing architectures and product roadmaps	Assess qualified alternatives and redesign requirements
EDA and design IP	Enables implementation, verification and manufacturing handoff	Establish dependable access and preserve reusable engineering knowledge
Process equipment	Supports specific manufacturing steps	Map tool-level service, spare parts and software dependencies
Advanced manufacturing	Provides production routes within and outside Europe	Evaluate actual process access and allocation
Packaging and integration	Completes advanced products	Qualify the package, materials and test route together
Software ecosystem	Influences the cost of substituting hardware	Include software migration in substitution assessments

This table sets analytical requirements rather than asserting that every US technology is irreplaceable. The critical issue is the time and cost of replacing a specific dependency within a qualified product.

China: scale expansion, domestic demand and competitive pressure

China’s position must be assessed through both technological capability and manufacturing scale. SEMI’s Q3 2026 World Fab Forecast identifies China as the expected largest installed-capacity location in 2026 and 2027. It does not establish that China leads in every process generation or product category. World Fab Forecast, Q3 2026 update — SEMI — 2026.

SMIC’s results provide a concrete company benchmark.

SMIC indicator	FY2025 disclosure	Definition
Revenue	$9.327bn	Unaudited annual result in the cited release
Gross margin	21.0%	Annual margin
Capital expenditure	$8.1bn	Annual investment expenditure
Year-end monthly capacity	1.059m wafers	Standard-logic 200 mm-equivalent basis
Annual shipments	Approximately 9.7m wafers	Company-reported annual shipments
Annualised capacity utilisation	93.5%	Company-reported

Source: Fourth Quarter 2025 Results — SMIC, HKEX filing — February 2026. SEMI

These figures demonstrate substantial production activity, but do not establish a current share of sub-7 nm capacity or the economics of any particular advanced process. The filing reviewed here does not provide the yield and cost evidence required for such a conclusion.

Chinese expansion can affect Italy even where it does not directly substitute for the most differentiated products. Additional qualified supply can alter pricing, customer bargaining power and utilisation in particular process segments. However, the effect depends on product qualification and substitution feasibility: nominally similar node labels do not prove that a Chinese process can immediately manufacture a European customer’s existing design.

The appropriate response is therefore product-specific monitoring. For each strategically important Italian production family, government should establish which competing processes are qualified, which customers can transfer and how rapidly market pricing can change. Aggregate national wafer capacity is too broad to answer those questions.

Japan: materials and equipment strength, alongside a new logic-manufacturing effort

Japan’s role cannot be reduced to the size of its chip-supplier revenue. Its materials and equipment companies participate upstream in production systems operated by manufacturers elsewhere.

Shin-Etsu’s 2025 report identifies semiconductor silicon, photoresists, photomask blanks, synthetic quartz and packaging-related materials among its activities, and reports a leading global position in silicon wafers. This establishes breadth and the company’s attributed ranking; it does not supply a compatible numerical national share for every materials segment. Annual Report 2025 — Shin-Etsu Chemical — 2025, electronics-materials sections.

Japan is also developing a new advanced-logic route through Rapidus. Its April 2026 account confirms that the pilot line began in April 2025, reports prototype 2 nm GAA transistor operation on 300 mm wafers, and retains 2027 as the target for mass-production commencement. Pilot operation and working prototypes are material milestones, but they are not evidence of achieved high-volume commercial manufacturing. NEDO Approves Rapidus’ FY2026 Plan and Budget for 2nm Semiconductor Projects — Rapidus — April 2026. shinetsu.co.jp

For Italy, the Japanese comparison shows that technological influence can be retained through indispensable upstream functions. The relevant lesson is the value of specialised materials and equipment competencies supported by customer qualification and sustained development.

Singapore: a direct comparator for attracting internationally controlled production

Singapore offers a particularly useful comparison because it combines foreign-controlled fabrication, materials, engineering and packaging rather than relying on domestic ownership of every major company.

UMC’s April 2025 announcement described a new Singapore facility with first-phase investment of up to $5 billion, eventual first-phase capacity of 30,000 300 mm wafers per month, and 22/28 nm processes. It targeted volume production in 2026. These were announced operating and capacity parameters, not proof of full utilisation at the present cut-off. UMC unveils new fab facility in Singapore — UMC — April 2025.

Micron’s January 2026 announcement provides a larger memory-manufacturing programme: approximately $24 billion over ten years, with an eventual 700,000 square feet of cleanroom space. The same disclosure identified the separately announced HBM packaging facility as expected to contribute meaningfully to supply in 2027. Micron Breaks Ground on Advanced Wafer Fabrication Facility in Singapore — Micron — January 2026.

Singapore programme	Published scale	Technological role	Status distinction
UMC new facility, first phase	Up to $5bn; 30,000 300 mm wafers/month at full phase capacity	22/28 nm specialty foundry	2025 opening announcement; volume production targeted for 2026
Micron advanced wafer fab	Approximately $24bn over ten years	NAND manufacturing and technology transitions	Groundbreaking in January 2026
Micron HBM packaging	Approximately $7bn through the decade and beyond	HBM development, assembly and test	Original start timetable distinct from meaningful supply contribution in 2027

Source for the HBM programme: Micron Breaks Ground on New HBM Advanced Packaging Facility in Singapore — Micron — January 2025. UMC

Singapore consequently competes with Italy for more than assembly investment. Its development model connects manufacturing, specialist labour, supplier infrastructure and future expansion within established campuses. Italy’s proposed packaging capability must be evaluated against those ecosystem conditions as well as the capital cost of an individual plant.

Segment market shares: the figures that can be used without changing denominators

Segment	Quantified benchmark	Reference period	Evidentiary status and limitation
DRAM	Samsung: 34.0% revenue share	2025	Company estimate disclosed using DRAMeXchange information
Power discretes and modules	Infineon 17.4%; onsemi 8.5%; ST 6.9%	2024	Omdia figures reproduced in Infineon’s November 2025 presentation
Global microcontrollers	Infineon: 23.2%	2025	Company attribution to Omdia
Automotive semiconductors	Infineon: 12.8%	2025	Company attribution to TechInsights
Automotive microcontrollers	Infineon: 36.0%	2025	Same attributed market study
Semiconductor testers	Advantest: 65%	Calendar 2025	Company-disclosed market estimate
SoC testers	Advantest: 66%	Calendar 2025	Company-disclosed estimate for its defined segment
Memory testers	Advantest: 61%	Calendar 2025	Company-disclosed estimate
Advanced logic	TSMC: 74% of its own wafer revenue from 7 nm and more advanced	2025	Internal revenue mix; not global market share
Mature/specialty foundry	UMC: 36% of quarterly revenue from 22/28 nm	Q4 2025	Internal mix; not global market share

Sources: Samsung FY2025 business disclosure; Company presentation — Infineon — November 2025, page 8; Infineon extends leadership position in global microcontroller market — March 2026; Infineon further extends its global leadership in the automotive semiconductor market — April 2026; FY2025 Financial Briefing — Advantest — April 2026, page 18; TSMC 2025 Annual Report; UMC Q4 2025 Results. Samsung 대한민국

The power-device figures refer to a $32.8 billion 2024 market for power discretes and modules. They cannot be relabelled as SiC shares: that category includes technologies beyond SiC. Likewise, Advantest’s tester estimates cannot establish its share of probe cards, where Technoprobe operates.

The automotive figures also demonstrate the importance of revised vintages. Infineon’s April 2026 disclosure revised its 2024 comparison to 13.2%, whereas an earlier presentation had shown 13.5%. The current 2025 comparison should retain the revised series rather than mixing the two releases.

A compatible, current numerical share for Italian SiC production, global sub-7 nm capacity, mature-node foundry production and individual wafer-material suppliers was not established from the opened admissible records. Those gaps are substantive: substituting unrelated revenue mixes would create a false appearance of completeness.

Materials and production investment: growing volume does not guarantee growing value

SEMI reported 12,973 million square inches of silicon-wafer shipments in 2025, up 5.8%, while wafer revenue declined 1.2% to $11.4 billion. The divergence shows that physical shipment growth and supplier revenue can move in opposite directions. SEMI Reports 2025 Annual Worldwide Silicon Wafer Shipments and Revenue Results — SEMI — February 2026.

Its Q3 2026 World Fab Forecast projects 5% installed-capacity growth in 2026 and 6% in 2027, alongside equipment spending of $159 billion and $180 billion, respectively. These are forecasts within SEMI’s fab-investment coverage, not realised expenditure or an interchangeable measure of total semiconductor equipment sales. World Fab Forecast, Q3 2026 update — SEMI. SEMI

For Italy, this creates a dual exposure. Expansion in materials and equipment can benefit from international investment, while additional global production can intensify competition and reduce returns in selected product families. Strategic support should therefore test utilisation, qualification and price assumptions rather than treating demand growth as a sufficient investment case.

Critical dependencies: the complete qualified route determines resilience

Dependency	Exposure mechanism	Why domestic capability alone may be insufficient	Decision-relevant test
Advanced logic fabrication	A required processor depends on a specific process and design	Power-device capacity cannot replace the missing processor	Is an alternative design manufacturable and software-compatible?
DRAM and HBM	Product architectures require qualified memory	Local packaging cannot create absent memory dies	Are alternative suppliers and generations qualified?
Design tools and IP	Design implementation relies on specific models and software	Engineering expertise may depend on continued tool access	Can projects remain supportable and transferable?
Materials	Purity and process compatibility constrain substitution	Domestic supply of one substrate does not cover all material specifications	What is the qualification and replenishment time?
Equipment and service	Tool availability, software and spares govern output	A local fab can stop because of a specialised external component	How long can production continue without external intervention?
Packaging	Dies require a compatible package and assembly route	Front-end output can accumulate without usable back-end capacity	Is a second qualified package route available?
Testing	Commercial acceptance depends on appropriate coverage	Installed fabrication does not establish accepted product	Are test systems, interfaces and programmes reproducible elsewhere?
Customer qualification	Process or supplier changes can require revalidation	Nominally similar capacity may not be immediately substitutable	What evidence establishes interchangeability?

For automotive and industrial users, the decisive constraint may be an inexpensive but qualified component. For defence users, the assessment must additionally examine traceability, configuration control, long-term support and application-specific assurance. For energy systems, converter architecture, maintenance requirements and component replacement routes determine whether supply diversification is practical. These are product-level analytical requirements; commercial availability or a generic quality designation does not establish suitability for every critical application.

Key judgments

Italy’s global position is strongest in selected functions that can capture value across international production networks. Its principal limitation is the absence of a complete domestically controlled route for advanced computing systems, particularly where logic, memory, packaging and software must operate together.

European strengths in equipment, research, power and specialty manufacturing provide bargaining power and industrial options, but do not remove external dependencies. Taiwan’s foundry scale, Korean memory production, US design and technology influence, Chinese capacity expansion, Japanese upstream capabilities and Singapore’s investment platform each create a different competitive and resilience challenge.

Confidence is high in reported financial results and documented milestones, moderate in company-attributed market shares, and necessarily conditional for forecasts and future programme outcomes.

What would change the assessment

The strongest positive evidence would be competitive European production in additional critical segments, qualified access to external alternatives, successful commercial packaging ramps and reduced substitution times. The assessment would weaken if market concentration increased faster than diversification, or if European investments added nominal capacity without commercially sustainable products and accessible customers.

Open official record

The priority collection requirements are a reconciled global process-capacity dataset, current SiC device and substrate shares, qualified advanced-packaging capacity by architecture, product-level memory dependencies, and the time required to transfer critical European designs between suppliers. These records are needed to distinguish strategic industrial strength from exposure concealed by aggregate market growth.

---

Pillar III — Investment Execution, Sovereignty and Policy Choices

Evidence cut-off: 19 October 2026. Financial commitments, regulatory approvals, construction milestones and operating results are treated separately throughout this pillar. Company production targets remain targets unless subsequent evidence establishes their achievement. Scenarios describe conditional outcomes; they do not assign probabilities unsupported by an empirical forecasting model.

Chapter 5. Strategic Investments, European Chips Act and Industrial Policy

5.1. The investment question: what public support actually purchases

Italy’s semiconductor investment programme should be assessed against three distinct outcomes: additional production located in Europe, commercially sustainable technological capability, and reliable access to critical components during disruption. These outcomes overlap, but expenditure on one does not automatically secure the others.

A subsidised factory can increase European manufacturing without transferring control over its technology. A technically successful facility can remain commercially vulnerable if customers qualify competing processes elsewhere. A profitable Italian site can still depend on imported materials, proprietary software, foreign maintenance services and overseas downstream production.

The central policy test is therefore how much additional, qualified and accessible industrial capability each intervention creates, at what fiscal cost, and with which remaining dependencies.

The current Italian portfolio also contains projects at materially different stages. Catania has entered a manufacturing ramp. MEMC has inaugurated its new substrate facility. Silicon Box has advanced through financing approval while construction authorisation remained a prospective milestone in the latest reviewed municipal account. Combining these stages into a single figure for “capacity created” would misrepresent execution.

Table 5.1 — Investment and execution ledger

Project or programme	Financial scale established in the reviewed record	Latest established milestone	Remaining distinction essential for policymakers	Confidence
ST Catania integrated 200 mm SiC campus	Approximately €5 billion programme; approximately €2 billion public support in headline announcements	ST reports manufacturing activities and ramp-up starting in Q2 2026	Ramp-up does not establish full installed capacity, stable yields or customer-qualified output across the entire intended product portfolio	High on manufacturing start; qualified volume undisclosed
Earlier ST Catania SiC substrate project	€730 million investment supported by a €292.5 million grant approved in 2022	Separate earlier aid measure and project scope documented	Reconcile assets, expenditure periods and upgrades before adding its figures to the later campus programme	High on original financial authorisation
Silicon Box, Novara	Up to €3.2 billion investment; €1.3 billion public support	Invitalia board approval reported on 1 October 2026	Financing approval is distinct from construction authorisation, construction completion and commercial qualification	High on reported administrative milestone
MEMC/GlobalWafers, Novara FAB300	A comparable total investment and aid figure is not established here	Inauguration on 15 October 2025	Inauguration does not disclose qualified monthly shipments or utilisation	High on inauguration; operating scale unresolved
MEMC TèNeT	Project identified as supported through NextGenerationEU and IPCEI ME/CT	Company identifies programme and project CUP	Project participation does not reveal the amount awarded, paid or attributable to individual FAB300 assets	High on participation; funding reconciliation unresolved
WBG pilot-line programme coordinated by CNR	€360 million across seven participating countries; Italian project component described as exceeding €200 million	Agreement announced in May 2025	Consortium budget, Italian component, national cofinancing and actual expenditure must remain separate	High on agreement and announced scope
Technoprobe TERABIT ERA	€2.459 million in grants received against €10.863 million of reported eligible costs	Company reports final settlements received on 23 October 2025	A documented payment for a completed project; it is not evidence of equivalent progress across other programmes	High on disclosed receipt

Sources: ST’s Q2 2026 filing, Commission approval of the earlier substrate measure, Novara’s October 2026 administrative update, MEMC’s FAB300 inauguration notice, MEMC’s supported-project register, CNR’s pilot-line agreement announcement and Technoprobe’s first-half 2026 financial report. sec.gov

The ledger should become a permanent administrative instrument. Each project needs an asset-level record linking the beneficiary, ultimate parent, aid decision, national award, financing agreement, eligible expenditure, payment, installed equipment and qualified output. Without this linkage, government cannot distinguish industrial progress from successive announcements concerning the same underlying investment.

5.2. Catania: strategically defensible integration, with a demanding economic test

The additionality is primarily European location and integration

The strongest argument for Catania is that it brings a larger share of an important power-semiconductor production chain within European territory and engineering control. Its public-policy justification should be tested against the credible alternative available to ST when the investment decision was taken.

That distinction matters. A project may be additional to Europe without being additional to global semiconductor capacity. Public support can change where production occurs, whether substrates are manufactured internally, and where process knowledge accumulates, even when the company would otherwise expand production elsewhere.

The Commission’s detailed Catania decision explicitly distinguishes a substrate make-versus-buy comparison from a European-versus-non-EEA location comparison for front-end and back-end activities. This provides a more useful starting point for evaluating additionality than a general claim that the investment would “not exist” without support.

Table 5.2 — Catania: the detailed financial record behind the rounded announcement

Item	Amount or provision	Interpretation
Nominal capital expenditure in the notified model	€5,058.6 million	Modelled expenditure, not a certified amount already spent
Nominal state aid	€2,063.2 million	More precise than the approximately €2 billion headline
Nominal expenditure less nominal aid	€2,995.4 million	Arithmetic financing residual; not evidence that all private financing has already been deployed
Aid divided by modelled nominal capital expenditure	40.79%	Calculated from figures on the same nominal basis
Net present value of aid	€1,045.3 million	Discounted value under the notified payment assumptions
Net present value of the funding gap	€1,170.7 million	A distinct discounted measure; not interchangeable with nominal aid
Clawback test dates	30 June 2031, 2034 and 2038	Correspond to project years 2030, 2033 and 2037

These figures, the counterfactual structure and the clawback dates appear in the Commission’s non-confidential Catania decision, SA.107594, particularly its financial-model and commitment sections. Calculations in the table are this assessment’s arithmetic. ec.europa.eu

The approximately 41% nominal support ratio is substantial. It should be interpreted as evidence that government is purchasing a location and capability outcome that the commercial counterfactual did not deliver on equivalent terms. It does not establish that the factory will remain uncompetitive after ramp-up, nor that the public intervention will generate an adequate social return. Those questions require operating evidence.

Production start changes the risk profile

ST’s disclosure of a Q2 2026 manufacturing start moves the new 200 mm operation beyond the announcement stage. The principal risks consequently shift toward process stability, yield improvement, customer qualification, product mix and the pace at which installed equipment earns revenue.

The original company announcement envisaged full build-out by 2033 and up to 15,000 wafers per week. Those figures describe a future configuration. They cannot be entered as actual 2026 capacity or assumed to be fully available in 2030. The 2024 company announcement and the 2026 operating disclosure answer different questions.

Government should also reconcile schedule terminology. The Commission’s 2024 public announcement referred to full operation in 2032, whereas ST’s announcement used full capacity by 2033. These dates may reflect different definitions or reporting conventions. The Commission announcement should therefore be reconciled with the company’s asset-by-asset implementation schedule rather than treated as an interchangeable deadline.

Integration reduces some dependencies while concentrating others

Vertical integration can improve coordination between substrate quality, epitaxy, device fabrication and module performance. It can shorten feedback between defects discovered downstream and corrective action upstream. These are plausible economic advantages, but their value must be demonstrated in qualified output and cost.

Integration also creates correlated exposure. A common utility interruption, site incident, manufacturing-control failure or engineering bottleneck can affect several production stages simultaneously. Internal substrate manufacture reduces reliance on external suppliers but can also reduce purchasing flexibility if external substrate prices fall faster than internal costs.

The policy implication is to support integration while preserving qualified external alternatives. Resilience improves when an integrated European production route exists alongside usable alternative inputs and recovery arrangements.

Capital allocation remains a continuing execution constraint

ST’s first-half 2026 filing reports $1.002 billion of cash payments for tangible assets and $771 million of its defined net capital expenditure measure. These are group-wide figures, not Catania expenditure. Their difference illustrates why gross equipment investment, cash expenditure and capital spending after grants cannot be used interchangeably. The same filing describes a policy of adjusting capital spending to market conditions. Source: ST Q2 2026 filing, capital expenditure reconciliation and investment discussion.

Catania therefore needs a protected but conditional implementation plan: sufficient continuity to retain engineering capability and complete economically useful production stages, with later equipment tranches linked to verified demand and manufacturing performance.

5.3. Silicon Box Novara: the administrative advance is material; the commercial bridge remains decisive

The latest milestone changes the schedule assessment

Silicon Box’s original site announcement envisaged construction beginning in the second half of 2025 and initial production in 2028. Those were forward-looking company expectations. Source: Silicon Box’s Piedmont site announcement.

The municipality’s 1 October 2026 account reports Invitalia board approval, describes further steps toward the construction authorisation, and identifies spring 2027 as the objective for starting works. This is stronger evidence of administrative progress than the original announcement, but it does not establish a completed construction authorisation or an updated, independently validated production schedule. Source: City of Novara, 1 October 2026.

Assessment: the original 2028 production target requires revalidation against the later construction sequence. This assessment does not substitute an invented replacement start date.

The Commission granted the project Open EU Foundry status in March 2026 and described full capacity as expected in 2033. That recognition is an institutional milestone; it does not establish equipment installation, qualified production or customer revenue. Source: Commission notice on Silicon Box’s OEF status. Shaping Europe’s digital future

Packaging capacity needs an entire commercial interface

Novara’s strategic value depends on connecting European design activity and external die production to a commercially usable European assembly and test service. Factory equipment is one component of that system.

Customers need compatible design rules, package models, thermal characterisation, test coverage, reliability evidence, intellectual-property arrangements and production support. They also need the upstream dies, substrates and other package components required by the chosen architecture.

Consequently, advanced packaging in Italy can reduce a major European dependency while leaving other dependencies intact. It does not create domestic leading-edge logic fabrication, memory production or an automatic substitute for every competing packaging platform.

Table 5.3 — Silicon Box: execution conditions that should govern public exposure

Execution condition	Evidence required	Why it matters	Appropriate public response
Construction readiness	Final authorisations, site availability, utility commitments and construction contracts	An approved financial envelope cannot overcome an unresolved physical critical path	Link construction-related payments to verifiable readiness and expenditure
Financing completeness	Binding equity commitments, debt facilities, drawdown conditions and contingency finance	The €1.9 billion difference between headline investment and public support is not proof of committed private funding	Review financing through completion and ramp losses
Technology transfer	Defined process modules, equipment recipes, engineering transfers and licence rights	Replicating a production capability requires tacit knowledge as well as tools	Verify transfer milestones and local engineering responsibilities
Anchor demand	Customer development programmes, qualification plans and capacity commitments	Packaging platforms require adoption before volume revenue appears	Support customer qualification where additionality is demonstrable
Package ecosystem	Qualified substrates, interconnect materials, thermal components and test interfaces	Missing complementary inputs can strand otherwise available capacity	Fund qualification of bottleneck inputs selectively
Industrial reliability	Product-specific reliability results and stable production controls	Demonstration samples do not establish high-volume acceptance	Require customer-relevant qualification evidence
Design access	Usable design kits, engineering support and economically accessible prototype runs	European SMEs cannot benefit from theoretical access alone	Measure completed customer programmes and turnaround
Local operating autonomy	Resident process owners, maintenance capability and controlled documentation	Dependence on continual overseas intervention weakens continuity	Build local process and recovery capability
Downturn resilience	Cash runway and an executable phased equipment plan	A slow qualification cycle can precede significant revenue	Preserve viable stages without automatically underwriting every expansion
Access during disruption	Legally enforceable arrangements consistent with applicable law	Domestic location alone does not determine allocation in a shortage	Review practical access and crisis procedures before an emergency

The support ratio implied by the headline amounts is 40.625%: €1.3 billion divided by €3.2 billion. This is a descriptive ratio, not a finding that Novara and Catania have identical aid intensity under comparable legal cost definitions.

The more important question is whether public support bridges a genuine European coordination failure. If the project enables customers, suppliers and designers to adopt a packaging route that would otherwise remain unavailable in Europe, additionality extends beyond the operator’s balance sheet. If it remains commercially isolated, the sovereignty return will be much smaller than the capital expenditure suggests.

5.4. MEMC and materials: converting an inaugurated asset into qualified supply

MEMC’s FAB300 inauguration establishes a completed physical milestone. Its next policy-relevant measures are qualification, saleable shipment volume, customer diversification, process quality and continuity under disruption.

A substrate facility can strengthen European resilience without being European-owned. The distinction is between ownership, production location, process control, contractual allocation and the ability to maintain production locally. These should be recorded separately.

MEMC’s supported-project register identifies TèNeT as an initiative for advanced 300 mm and 200 mm silicon-wafer manufacturing in Italy, supported through NextGenerationEU and IPCEI ME/CT. It does not, by itself, provide the full reconciliation between that support and individual FAB300 assets. Source: MEMC supported-project register.

For materials investments, government should assess qualified substitution capability. Additional domestic wafer output matters most when it can serve actual European fabrication processes and replace a disrupted source within a useful timeframe. Nominal wafer diameter and theoretical monthly output do not establish that substitution.

Table 5.4 — Materials and enabling investments: the outcome to purchase

Investment category	Additionality test	Evidence of a useful industrial outcome	Principal implementation risk
Silicon substrates	Does the investment add a qualified source for European fabrication?	Customer-approved wafer families and sustained shipments	Long qualification periods or a narrow approved customer base
SiC substrates and epitaxy	Does it reduce a critical dependency at acceptable device-level cost?	Stable downstream device yield using the local input	Substrate improvement fails to translate into good-device economics
Electronic-grade chemicals and gases	Does it remove a source or purification bottleneck?	Qualified supply at required purity, volume and delivery frequency	Local production depends on the same concentrated upstream source
Packaging materials	Does it fill a missing input required by European package platforms?	Approval in specific customer packages	Specification changes or lack of sufficient customer scale
Metrology and contamination control	Does it improve qualification, yield or recovery?	Measured process improvement and acceptance by production users	Equipment acquisition without adequate applications engineering
Reclaim, recycling and recovery	Does recovered material meet a usable specification?	Qualified recycled input and verified recovery performance	High recovery tonnage with little semiconductor-grade output
Specialist logistics	Does it shorten recovery and preserve material integrity?	Validated routes, handling controls and alternative delivery arrangements	Warehousing without assured replenishment

This approach also improves funding discipline. “Materials sovereignty” should not become a broad subsidy label for ordinary industrial activity. Support should target an identified bottleneck, a credible qualification route and an outcome that users can verify.

5.5. Chips Act, state aid, IPCEI and national incentives: distinct mechanisms

The European Chips Act is a framework for research, investment facilitation and supply-chain resilience. It is not a single centrally administered fund covering every investment announced under its political umbrella.

The European Court of Auditors identified this fragmentation clearly: the Commission directly controlled only a limited part of the wider funding architecture, while much depended on Member States and private investment. This complicates both coordination and measurement. Source: European Court of Auditors, Special Report 12/2025.

The relevant mechanisms should be kept separate in every ministerial submission.

Table 5.5 — Policy instruments and their proper interpretation

Instrument or status	Primary function	What the record can establish	What must be verified separately
Project-specific state-aid approval	Determines compatibility of notified public support	Approved amount, conditions and legal basis	National award, contractual terms, expenditure and actual payments
National grant or development agreement	Implements support through a domestic mechanism	Beneficiary obligations and financing arrangements	Fulfilment of milestones and certified payment
Integrated Production Facility or Open EU Foundry recognition	Recognises a facility under the Chips Act framework	Recognition and associated commitments	Construction, production readiness and practical customer access
IPCEI participation	Supports qualifying innovation and first industrial deployment	Approved participant and project scope	National funding, expenditure, spillovers and deployment results
Chips JU project or pilot line	Supports collaborative technological capability	Grant agreement, consortium and work programme	Commissioned equipment, access and industrial use
RRF/NextGenerationEU financing	Provides a source of financing for eligible measures	Connection to the relevant financing instrument	Payment conditions, project accounting and overlap with other labels
Tax incentive	Alters eligible project economics	Statutory eligibility and claimed benefit	Incremental activity caused by the incentive
Public loan or guarantee	Changes financing availability or risk allocation	Financing terms and public exposure	Commercial viability, repayment capacity and contingent liability

The Commission’s June 2023 IPCEI ME/CT approval covered up to €8.1 billion in public support, with €13.7 billion in additional private investment expected, across 68 projects undertaken by 56 companies in 14 Member States. These are programme-wide approval and expectation figures, not Italian receipts or completed investment. The framework concerns innovation and first industrial deployment; it should not be treated as a general authorisation to subsidise routine mass production. Source: Commission IPCEI ME/CT announcement.

For Italy, participation should be evaluated through completed technical work, deployment and spillovers. A project that develops useful process knowledge but never reaches a production user needs a different assessment from a project that establishes an adopted industrial capability.

The 2026 proposal must remain separate from operative law

The Commission presented Chips Act 2.0 on 3 June 2026. At the evidence cut-off, the European Parliament’s procedure record showed it awaiting committee decision. It is therefore treated here as a legislative proposal, not enacted replacement legislation. Sources: Commission’s technology-sovereignty package announcement and European Parliament procedure 2026/0139(COD). European Parliament

The proposal’s attention to industrial deployment, strategic dependencies, design, photonics and coordination creates an opportunity for Italy to argue for value-chain outcomes rather than national project totals. However, an expected future instrument should not be entered into a project’s financing plan as though its provisions and resources were already assured. Source: European Parliament’s proposal summary.

5.6. Infrastructure and skills: conditions that can determine the investment outcome

Semiconductor infrastructure should be evaluated through service reliability and recovery, not annual resource availability alone.

Electricity contracts must be distinguished from physical power quality and redundancy. Water availability must be distinguished from the ability to deliver, purify, recycle and discharge the volumes required by a specific operating configuration. A site can possess a nominal connection while remaining exposed to interruptions that damage work in progress or require lengthy requalification.

The reviewed public record does not establish comparable, independently verified utility headroom for all major Italian projects. Consequently, this assessment does not assert that Catania or Novara has a quantified power or water deficit. It identifies the records needed to judge readiness.

Table 5.6 — Infrastructure and workforce assurance requirements

Constraint	Evidence needed before major ramp commitments	Failure mechanism	Preferred intervention
Electrical supply	Committed capacity, redundancy, disturbance history and recovery tests	Equipment trips, damaged work in progress or production interruption	Joint site–network resilience plan with tested recovery
Water and wastewater	Process-specific balance, treatment capability, discharge permissions and drought arrangements	Restricted throughput or loss of process control	Qualified recycling and alternative supply arrangements
Industrial gases and chemicals	Approved sources, replenishment lead times and disruption stocks	A low-cost consumable stops an entire production route	Qualify alternatives and secure critical replenishment
Tool servicing	Maintenance agreements, specialist availability and spare-part lead times	Installed capacity becomes unavailable	Local service skills and targeted spare holdings
Construction capacity	Contractor availability, cleanroom experience and integrated schedule	Delayed tool installation and commissioning	Coordinate infrastructure and specialist construction packages
Process engineering	Staffing by process module, shift and qualification stage	Equipment arrives before the team can stabilise it	Recruit and train against the actual commissioning sequence
Operators and technicians	Training completion, shift coverage, retention and certification	Unstable operations or constrained shifts	Employer-linked technical training and paid practical experience
Housing and mobility	Recruitment catchment, commuting and accommodation costs	Nominal hiring demand cannot become retained staff	Regional housing, transport and family-service planning
Research-to-production transfer	Named process owners, transfer documentation and industrial users	Pilot results remain detached from manufacturing	Fund transfer work and shared engineering appointments

Employment commitments require similar discipline. Construction jobs, permanent operating jobs, transferred employees and net additional national employment are different measures. Headline hiring can coexist with shortages elsewhere if firms recruit predominantly from the same limited pool.

The most valuable skills programmes will therefore be tied to specific process modules, production shifts and qualification needs. Scholarships and general enrolment targets are supporting measures; they are not substitutes for trained teams available when equipment is commissioned.

5.7. Policy prioritisation: fund the missing link and verify its use

Italy should organise its next phase of support around the completion and adoption of capabilities already entering the investment pipeline.

This does not imply that new projects should be excluded. It means that a new capital commitment should compete with the option of resolving a smaller bottleneck in an existing investment. A qualification laboratory, a scarce process-engineering team or a materials approval programme may create more usable capacity per euro than another production building.

Table 5.7 — Recommended policy priorities

Priority	Proposed measure	Lead responsibility	Evidence of success	Main downside to control
1	Establish a unified project, payment and output register	MIMIT with MEF, Invitalia and relevant regional authorities	Reconciled quarterly records	Reporting burden without operational use
2	Link later investment tranches to technical and commercial milestones	Awarding authorities, within applicable agreements	Verified progress toward qualified output	Excessively rigid conditions that obstruct a viable ramp
3	Finance customer qualification and design-in activity	MIMIT, research bodies and industrial users	Completed approvals and adopted products	Subsidising activity that customers would fund anyway
4	Resolve critical utility and service dependencies	Regions, network operators and project owners	Tested continuity and recovery capability	Infrastructure built ahead of credible industrial demand
5	Develop missing packaging and materials interfaces	Italian and European industry programmes	Qualified complementary suppliers and interoperable processes	Fragmented small projects without anchor customers
6	Make pilot-line access commercially usable	CNR, Chips.IT, FBK and consortium partners	Completed external-user programmes and industrial transfers	Access exists formally but remains slow or unaffordable
7	Build workforce capacity against commissioning schedules	Firms, universities, ITS Academy and regions	Competent teams retained in required roles	Subsidised recruitment merely redistributes existing staff
8	Purchase resilience services for selected critical products	Relevant public customers and industrial operators	Qualified alternative routes and executable continuity plans	Paying for unused capacity without a defined security need
9	Preserve alternatives in global supply relationships	MAECI, MIMIT, EU institutions and firms	Reduced recovery time and independent qualified sources	Diversification that duplicates the same upstream dependency

A proportionate intervention should also have a review mechanism. Technical milestones can justify continued support, a slower equipment phase or a redesign of scope. They should not automatically trigger either cancellation or rescue.

Chapter 5 — Key judgments

Catania has the strongest immediately demonstrable execution position among the major new programmes examined, because manufacturing has begun. Its remaining test is sustained, qualified and economically useful output. Confidence: high on the milestone; moderate on the long-term outcome.

Silicon Box has progressed materially through financing approval, but its schedule and commercial ecosystem require fresh validation. The October 2026 construction sequence should supersede unqualified reliance on the original announcement. Confidence: high on the administrative sequence; limited on the eventual ramp timetable.

MEMC strengthens an important upstream capability, but qualified shipment data are needed to quantify its resilience contribution. Confidence: high on the physical milestone; limited on operating scale.

The assessment would improve with reconciled project expenditure, customer qualification, credible private financing and verified infrastructure readiness. It would weaken if capital spending continued while qualification, staffing or anchor demand failed to progress.

Chapter 6. Risks, Dependencies and Scenarios

6.1. Sovereignty should be measured as the ability to continue critical functions

Semiconductor sovereignty is most useful as an operational concept: the ability to sustain priority industrial and public functions despite disruption, commercial pressure or restrictions affecting external suppliers.

This definition avoids treating every import as an equivalent weakness. Some dependencies are diversified, contractually manageable and inexpensive to buffer. Others combine concentrated supply, proprietary technology, long qualification times and limited substitution.

The relevant unit is often a specific component, process step or service, not a national semiconductor industry. A domestic power-device factory cannot replace a missing processor. A European lithography supplier cannot substitute for every imported deposition, inspection or test tool. An Italian packaging line cannot complete a product if its memory dies or package substrates are unavailable.

The dependency assessment must therefore ask whether the alternative is qualified, independent and fast enough to preserve the function concerned.

Table 6.1 — Dependency and control matrix

Dependency	Exposure to assess	Why Italian investment alone does not remove it	Effective resilience measure
Advanced logic fabrication	Access to the specific process, capacity allocation and design ecosystem	Power and packaging investments do not create equivalent logic processes	Qualified alternative designs where feasible; diversified production access
Memory, including HBM	Product availability, integration requirements and supplier concentration	Packaging capability does not create memory-die supply	Product-specific sourcing and architecture choices
Semiconductor manufacturing equipment	Tool availability, licences, service, software and spares	Physical installation leaves continuing support dependencies	Local servicing, critical spares and tool-route alternatives
Lithography ecosystem	Optical, source, control and maintenance dependencies	A European headquarters does not make the whole system nationally self-contained	Map subsystem and service dependencies by installed tool
EDA software and semiconductor IP	Licence continuity, export permissions, updates and foundry qualification	Local designers can still depend on external software and IP	Multiple usable routes where practical; continuity and recovery arrangements
Materials and consumables	Purity, upstream origin, approved supplier count and replenishment	Local distribution can conceal concentrated external production	Qualify independent sources and appropriate buffers
Packaging inputs	Substrates, interconnects, thermal materials and known-good dies	Assembly capacity requires a complete input set	Co-qualify package inputs and alternative architectures
Manufacturing software and data	Recipe integrity, operational systems and recovery capability	A domestic site can remain dependent on external digital services	Tested restoration, controlled access and offline recovery procedures
Overseas downstream production	Where devices are assembled into modules and finished systems	Domestic wafer fabrication may still feed a foreign production chain	Qualify alternative downstream routes for critical products
Specialist personnel	Process ownership, maintenance knowledge and key-person exposure	Employment totals do not measure the concentration of tacit knowledge	Cross-training, documented recovery and distributed technical ownership

This table is an analytical framework. It does not imply that every listed dependency is equally severe for every Italian facility. Site-level conclusions require confidential bills of materials, approved supplier lists, installed-tool records and continuity arrangements.

6.2. Risk transmission: how an external shock reaches an Italian factory

Risks often compound. A delayed tool shipment can postpone customer qualification; postponed qualification can delay revenue; lower revenue can constrain the financing of the next equipment phase. Administrative, commercial and technological risks should therefore be modelled as linked mechanisms.

Table 6.2 — Principal transmission mechanisms

Initial shock	First industrial effect	Secondary effect	Evidence to monitor	Response with the greatest practical value
Weaker SiC demand or sharper price competition	Lower loading and selling prices	Slower cost reduction and weaker investment cash flow	Orders, cancellations, prices, inventory and customer programmes	Adjust equipment phasing while preserving viable process capability
Difficult manufacturing ramp	Fewer saleable devices per start	Higher unit cost and delayed qualification	Yield by process step and product family	Target the dominant defect and engineering bottleneck
Construction or utility delay	Tools cannot be installed or operated as planned	Financing costs and staff arrive before revenue	Critical-path schedule and connection milestones	Resolve the actual schedule constraint before ordering dependent equipment
Delayed customer adoption	Available capacity remains underused	Longer cash consumption and pressure for additional support	Qualification gates and signed production releases	Accelerate customer engineering and prototype turnaround
Export or licensing restriction	Tool, software, component or service becomes unavailable	Production interruption or redesign	Product-specific legal and supplier notices	Activate a previously qualified alternative route
Supplier failure	Loss of an approved input or specialist service	Extended requalification and production interruption	Financial health, delivery performance and concentration	Independent source qualification and targeted stocks
Cyber incident or data corruption	Loss of process control or production information	Scrap, restoration delays and requalification	Recovery tests and separation of critical systems	Restore validated systems and trusted process data
Skills shortfall	Incomplete shift or process coverage	Slower ramp and reliance on external specialists	Role-specific vacancies, retention and competence	Train and retain the missing production roles
Financing shortfall	Equipment or working-capital commitments are deferred	Partial facility with insufficient economic scale	Binding funding, drawdown conditions and liquidity runway	Re-scope to a financeable, commercially useful stage

ST’s own discussion of the SiC downturn in its 2025 results is a reminder that strategic relevance does not remove cyclical demand risk. Management’s subsequent recovery expectations are forecasts, not evidence that demand has already recovered to the anticipated level. Source: ST’s 2025 full-year prepared remarks.

A similar distinction applies upstream. SEMI reported that worldwide silicon-wafer shipment area increased by 5.8% in 2025, while revenue declined by 1.2%. More physical shipment volume therefore did not imply higher aggregate supplier revenue. These are silicon-wafer statistics, not a measure of SiC demand or MEMC’s individual performance. Source: SEMI’s 2025 silicon-wafer results. SEMI

6.3. Manufacturing economics: the sensitivities that should govern decisions

Public discussion tends to emphasise announced capacity because it is visible and easy to communicate. Investment performance depends on the interaction of utilisation, yield, selling prices, product mix and the cost of the complete production route.

A simplified relationship is:\[ \text{Saleable devices} = \text{wafer starts} \times \text{gross dies per wafer} \times \text{front-end yield} \times \text{assembly yield} \times \text{final-test yield} \]

Each yield must represent a distinct stage. Multiplying overlapping yield measures would understate output; omitting a stage would overstate it.

Commercially accessible output is narrower still. A device can pass manufacturing tests without having completed the customer approvals needed for a particular application. Qualified output must consequently be recorded by product and customer programme, rather than estimated by applying one undifferentiated approval percentage to a whole factory.

Table 6.3 — Illustrative sensitivities; these are arithmetic examples, not Italian project forecasts

Illustrative change	Assumptions held constant	Arithmetic consequence	Decision relevance
Utilisation falls from 80% to 40%	Installed capacity and annual fixed cost	Fixed cost per produced unit doubles	A larger facility can have worse economics if demand fails to fill it
Yield falls from 80% to 60%	Starts, die size and pre-yield manufacturing cost	Cost per good die rises by 33.3%	Yield improvement can be more valuable than additional equipment
Selling price declines by 20%	Units sold and product mix	Revenue declines by 20%	Technological progress does not guarantee revenue growth
Two independent stages each yield 90%	No additional losses	Combined yield is 81%	Good performance at individual stages can still produce substantial combined loss
Two independent stages each yield 80%	No additional losses	Combined yield is 64%	Interface losses can undermine an integrated route
Grid electricity price rises by 20%	Electricity equals 10% of total cost; usage unchanged	Total cost rises by 2%	Energy sensitivity depends on the actual cost structure
Nominal capacity rises by 25%, utilisation falls from 80% to 60%	Yield unchanged	Output becomes 93.75% of the original level	Capacity expansion can coexist with lower production
Domestic supplier count rises from one to two	Both use the same sole upstream source	No independent upstream redundancy is created	Supplier count alone is an inadequate resilience metric

These examples should be replaced with confidential project inputs before funding decisions. They demonstrate why a universal subsidy-per-wafer comparison would be misleading across SiC, silicon substrates, advanced packaging and test equipment.

For public authorities, the relevant sensitivity model should include at least four joint stresses: weaker prices, slower qualification, lower yield and delayed ramp. Testing each independently can conceal a financing shortfall that appears only when several occur together.

6.4. Qualification time is the bridge between dependency and disruption

A potential substitute is strategically useful only if it can become available before the affected function fails.

Two measures should anchor continuity planning:

• Time to survive: how long a critical function can continue using available stocks, alternative production and demand-management measures.
• Time to recover: how long it takes to restore the interrupted source or activate an acceptable alternative.

A simplified exposure measure is:\[ \text{Uncovered disruption period} = \max(0,\ \text{time to recover}-\text{time to survive}) \]

This relationship is a planning device. Recovery tasks can overlap, and different components can constrain the same system. It should therefore be applied to specific production routes and products, not summed mechanically across the whole economy.

For defence and critical infrastructure, holding finished, qualified components may sometimes provide greater near-term protection than holding unqualified material or subsidising capacity that cannot manufacture the required part. For high-volume commercial products, alternative designs and source qualification may provide better long-term protection than large inventories exposed to obsolescence.

6.5. Three conditional pathways through 2030–2035

The scenarios below begin from verified milestones rather than assuming that every announced project reaches its original design limit.

They are conditional pathways, not probability-weighted forecasts. No numerical Italian market share or wafer-output trajectory is assigned where verified starting capacity, customer allocation and ramp curves are unavailable.

Table 6.4 — Scenario comparison

Dimension	Baseline execution	Accelerated European build-out	Constrained or delayed investment
Defining condition	Major projects advance, with selective phasing and uneven qualification	Industrial investment, customer adoption, skills and complementary inputs progress together	Demand, financing, infrastructure or technology-transfer constraints interrupt execution
Catania by 2030	A larger qualified 200 mm production base; further expansion remains performance-dependent	Faster yield learning and customer adoption support broader production capability	Manufacturing continues, but equipment phases or product qualifications advance more slowly
Novara packaging by 2030	Initial qualified services are possible if construction, transfer and customer adoption succeed	Several European customer programmes use a commercially established platform	Commissioning or qualification remains limited; announced capacity exceeds usable output
Materials by 2030	Additional qualified supply develops selectively	More European fabs approve Italian materials and alternative sources	Physical assets exist, but customer approvals or utilisation lag
European integration by 2030	Stronger links in power and selected packaging applications	Cross-border design, materials, production and test operate as connected routes	National projects remain commercially fragmented
Position by 2035	Deeper specialisation and improved resilience in selected segments	A more complete European industrial system with reduced recovery times	Valuable capabilities survive, but dependence and fiscal exposure remain high
External dependencies	Persist in advanced logic, memory, tools, software and selected materials	Reduced selectively through alternatives and stronger European bargaining power	Persist while domestic projects provide less relief than expected
Fiscal implication	Continued expenditure requires disciplined milestone review	Higher coordinated expenditure can yield broader spillovers	Pressure grows for extensions, restructuring and additional support
Core policy response	Complete viable capabilities and resolve bottlenecks	Scale interoperable capabilities and industrial adoption	Protect critical knowledge; re-scope or stop unsupported expansion

Baseline execution

The baseline assumes that Italy converts a meaningful part of its current investment pipeline into operating capability, but that demand and qualification determine the pace of later expansion.

By 2030, success would mean a broader set of qualified SiC products, additional approved substrate supply and a usable advanced-packaging service if Novara’s implementation conditions are met. It would not require every project to have reached its final design capacity.

By 2035, Italy would possess greater industrial depth in selected segments, while continuing to rely on international production for many complex computing and memory requirements. The sovereignty improvement would be substantial for particular production routes and limited for others.

This pathway is falsified if major projects fail to convert commissioning into sustained commercial output. It is exceeded if customer adoption and complementary investment develop faster than the initial project plans require.

Accelerated European build-out

The accelerated pathway requires coordinated industrial use of new capacity. Faster construction alone is insufficient.

European customers would need to commit development resources and purchasing demand. Research programmes would need to deliver transferable processes and usable access. Materials suppliers would need to qualify against production specifications, while training systems produce staff in time for commissioning.

By 2035, the principal gain would be the ability to route more products through connected European design, manufacturing, packaging and test arrangements. Europe would remain interdependent with global suppliers, but possess more alternatives and greater bargaining power.

The strongest evidence for this pathway would be multiple successful cross-border customer programmes, growing qualified shipments, measurable process transfers and shorter recovery times for critical products.

Constrained or delayed investment

The constrained pathway includes partial success. Some production can operate while later equipment phases remain deferred, utilisation stays low or qualification advances more slowly than expected.

Its principal danger is an extended period in which public expenditure accumulates ahead of commercially usable capability. Support then becomes vulnerable to a sunk-cost argument: further spending is justified because substantial spending has already occurred.

By 2035, Italy could retain important engineering assets and successful niches while achieving a smaller sovereignty gain than the original announcements implied. Policy would need to distinguish temporary ramp problems from an investment configuration that no longer has a credible market.

The appropriate response would be selective restructuring. Preserving a viable process, skilled team or qualified production line can be justified even when completing the original maximum scope is not.

6.6. Early warnings: monitor conditions that precede failure

An effective monitoring system should identify deterioration before a missed final completion date. The relevant thresholds should be agreed against project-specific plans, not imposed as arbitrary universal percentages.

Table 6.5 — Proposed early-warning dashboard

Indicator	Deterioration to investigate	Required interpretation	Possible action
Critical-path schedule	Repeated slippage without a credible recovery plan	Distinguish administrative, infrastructure and technical causes	Re-baseline dependent commitments
Qualified yield	Persistent gap against the agreed learning trajectory	Separate new-product effects from systemic process defects	Concentrate engineering on the limiting process
Customer qualification	Development activity fails to reach production release	Identify whether the obstacle is technical, commercial or customer timing	Support targeted qualification work
Capacity loading	Tool additions continue while committed demand weakens	Distinguish strategic reserve from unintended underutilisation	Rephase equipment installation
Private financing	Funding depends increasingly on uncommitted future rounds	Review liquidity through the next viable operating stage	Require binding finance or reduce scope
Supplier qualification	Alternative suppliers remain perpetually “under evaluation”	Check whether they are technically and geographically independent	Fund completion of useful alternatives
Workforce readiness	Equipment delivery outpaces competent staffing	Measure roles and shifts, not total recruitment	Adjust training and commissioning
Public payments	Payments advance faster than certified progress	Reconcile eligible expenditure and actual assets	Apply contractual verification and remedies
Pilot-line use	Few external programmes reach completion	Investigate access cost, turnaround and process usability	Redesign access and transfer support
Cost competitiveness	Forecast improvements depend on unsupported utilisation or prices	Compare with current customer alternatives	Review scope and commercial assumptions

These are recommended monitoring rules. They are not findings that the named Italian projects have breached their agreements.

6.7. Sectoral consequences and the appropriate resilience instrument

The same semiconductor investment has different security value across automotive, industrial, defence and energy applications. Public support should reflect those differences.

Table 6.6 — Sector-specific resilience priorities

Sector	Main consequence of interruption	Useful Italian or European capability	Residual dependency	Preferred policy instrument
Automotive	Production stoppages, redesign and delayed vehicle programmes	Qualified power devices, analog, sensors and selected packaging	Process-specific controllers, memory and other imported components	Supplier qualification, design flexibility and continuity agreements
Industrial machinery	Inability to ship or service long-life equipment	Power electronics, control interfaces and test capability	Obsolete or sole-source embedded components	Lifecycle procurement, redesign support and component inventories
Defence and aerospace	Loss of mission capability, maintenance or trusted supply	Controlled production, traceability, secure design and qualified test	Specialised processors, memories and long qualification chains	Product-specific trusted routes, controlled stocks and qualification
Electricity networks and renewable energy	Delayed installations, repair constraints or reduced conversion efficiency	Power devices, modules and reliability engineering	Control electronics, packaging inputs and system-level components	Long-term qualification and repair continuity
Data-centre infrastructure	Deployment delays or reduced system availability	Power conversion and selected packaging capabilities	Advanced logic, HBM and high-performance interconnects	Diversified sourcing and system-level continuity planning

The security value of capacity should therefore be demonstrated through a named function and a credible disruption scenario. “Strategic” should identify an operational need, not replace the economic assessment.

Chapter 6 — Key judgments

The most consequential risks are combinations of demand, qualification, yield and financing. Their interaction can delay revenue while increasing cash requirements. Confidence: high in the mechanism; project-specific exposure requires confidential data.

Domestic production improves resilience when it creates an independently usable route. Ownership, location and supplier count are insufficient indicators on their own. Confidence: high.

The accelerated scenario depends on European industrial coordination and customer adoption. Faster construction without those conditions can increase underused capacity. Confidence: moderate, because the outcome depends on policy and commercial execution.

The assessment would improve if qualified alternatives, customer commitments and recovery capability expanded alongside production. It would weaken if reporting remained focused on buildings, announced spending and nominal capacity.

Chapter 7. Data Sources, Methodologies and Priority Intelligence Questions

7.1. The analytical requirement: comparable records before aggregate conclusions

A credible semiconductor strategy needs several linked accounts:

1. A physical account of facilities, equipment, production and qualified output.
2. A financial account of investment, support, expenditure and payments.
3. A technological account of processes, products and qualification.
4. A control account of ownership, licences, allocation rights and external dependencies.
5. A resilience account of alternatives, stocks and recovery times.

No single market-share statistic captures all five.

The largest recurring analytical error is to combine figures that answer different questions: corporate sales with domestic production, announced investment with completed expenditure, wafer area with device value, or legal approval with available capacity.

The evidence framework should preserve these distinctions even when doing so produces a less dramatic headline.

7.2. Source hierarchy and fitness for purpose

Authority depends on the claim being tested. A company filing can be the strongest source for its reported expenditure, while a government decision is stronger for the legal ceiling of support. Neither automatically proves customer-qualified production.

Table 7.1 — Source hierarchy for the Italian semiconductor investment assessment

Source category	Best use	Principal limitation	Example
Non-confidential aid decisions	Approved support, counterfactuals, conditions and commitments	Confidential commercial inputs may be redacted	Catania SA.107594 decision
EU legislative and procedure records	Operative framework and stage of proposed legislation	A proposal does not establish future enacted provisions	Chips Act 2.0 procedure
National and local administrative records	Awards, permits, development agreements and implementation milestones	Announcements may summarise rather than reproduce binding instruments	Novara administrative update
Statutory and financial filings	Expenditure, accounting, liquidity, grants and operating disclosures	Group consolidation can obscure individual sites	ST Q2 2026 filing
Company project announcements	Original scope, intended technology and target dates	Forward-looking and interested statements	Silicon Box site announcement
Research grant and consortium records	Budgets, partners, work packages and access obligations	Award does not establish commissioned infrastructure	CNR WBG agreement announcement
Industry statistical organisations	Consistent market and capacity series	Detailed facility data may require licensed access	WSTS Spring 2026 release, SEMI World Fab Forecast
Official statistical agencies	Employment, value added, production and trade	Industrial classifications are broader than semiconductor-specific capabilities	Eurostat ICT-sector methodology
Independent public audit	Funding governance, implementation weaknesses and evaluation	Findings reflect the audit period	European Court of Auditors report
Patent and technical records	Invention activity, applicants, technology families and research direction	Patent counts do not prove production competence or freedom to operate	Project-specific patent-family and technical review required

Company releases remain valid primary evidence of what a company announced. They require a different confidence treatment when used to predict what the company will achieve.

Similarly, an official political announcement can accurately report an approval while using promotional descriptions of the project’s eventual impact. The approval and the projected impact should be extracted as separate claims.

7.3. Comparable capacity: a minimum data dictionary

Every capacity figure should include a date, unit, material, process, stage and status. An entry reading only “50,000 wafers per month” is analytically incomplete.

Table 7.2 — Minimum definitions for comparable measurement

Metric	Required definition	Essential accompanying information	Comparison to avoid
Installed front-end capacity	Sustainable starts supported by installed and commissioned tools	Diameter, material, process family and period	Announced maximum versus current installed capacity
Available capacity	Installed capacity available after maintenance and operational constraints	Downtime and bottleneck assumptions	Installed tools versus productive availability
Actual wafer starts	Wafers entering the defined process during the period	Site, material, diameter and process	Starts versus completed wafers
Completed wafer output	Wafers completing the defined route	Yield convention and work-in-progress treatment	Completed wafers versus good dies
Good-die output	Devices passing the defined front-end acceptance criteria	Die size, product mix and test coverage	Wafer area versus device count
Qualified commercial output	Production approved for the relevant customer/application	Product and qualification scope	Engineering samples versus production releases
Substrate capacity	Saleable substrates meeting specified quality	Diameter, grade, finish and epitaxy inclusion	Raw substrates versus processed device wafers
Packaging capacity	Output of a specified package process	Panel/wafer dimensions, package type and complexity	Panels per week versus finished packages
Test capacity	Devices or insertions supported under a defined test programme	Test duration, parallelism and coverage	Tester count versus tested-device throughput
Utilisation	Actual loading divided by a stated capacity denominator	Bottleneck and time basis	Company utilisation measures with different denominators
Capital expenditure	Defined gross or net expenditure over a stated period	Grants, acquisitions, maintenance and currency	Group net capex versus project gross investment
Public support	Defined approval, award or payment	Instrument, beneficiary, date and eligible costs	Aid ceiling versus cash received
Employment	Defined direct site employment or full-time equivalent	Date, contractor treatment and construction status	Temporary construction jobs versus permanent operations
R&D intensity	R&D expenditure divided by a defined revenue or value-added measure	Group/site scope and capitalisation	Consolidated corporate R&D versus national research activity
Semiconductor market share	Revenue or output share in a defined segment	Geography, ownership, period and denominator	Foundry service revenue versus total chip sales
Resilience coverage	Critical functions supported through a specified disruption	Stocks, qualified alternatives and recovery time	Domestic supplier count versus independent continuity

Wafer-area equivalents can help compare physical scale:\[ \text{200 mm area equivalents} = \text{wafer count}\times\left(\frac{\text{diameter}}{200}\right)^2 \]

Thus, one 300 mm wafer has 2.25 times the gross area of a 200 mm wafer. This conversion does not account for edge losses, die size, process complexity, defect density, material differences or selling value. It should never be used to imply economic equivalence between a silicon logic wafer and a SiC power-device wafer.

For packaging, panel counts require even more qualification. Dimensions, package density, interconnect architecture and product mix can change the commercial meaning of a panel substantially.

7.4. Market-share definitions: separate production, ownership and demand

A country can host substantial production by foreign-owned companies. A domestic company can earn revenue from devices manufactured abroad. A region can consume large quantities of chips without producing them.

These observations require separate indicators.

Table 7.3 — Market-share measures and the question each answers

Measure	Numerator	Appropriate denominator	Decision question
Territorial manufacturing share	Production physically located in Italy or the EU	Comparable global production	How much production is geographically exposed to domestic conditions?
Domestic-headquartered company share	Revenue of companies classified under an explicit headquarters rule	Comparable global company revenue	Where are commercial strategy and corporate control concentrated?
Ultimate ownership/control share	Activity attributed under a stated control methodology	Comparable controlled activity	Which jurisdictions can influence corporate decisions?
Foundry share	Defined external manufacturing-service revenue	Comparable foundry market	Who supplies contract fabrication services?
Product-segment share	Revenue from a specified chip category	Global revenue in that category	Where does the ecosystem hold a commercial position?
Equipment share	Revenue in a defined equipment category	Global category revenue	Which suppliers control production-enabling tools?
Materials share	Sales or shipments of a defined material	Comparable global material market	Where are approved upstream sources concentrated?
Consumption or shipment-market share	Sales delivered to customers in a region	Global sales on the same regional basis	Where is recorded demand located?
Critical-function coverage	Priority demand supported by qualified routes	Defined national or European critical demand	Which functions can continue during disruption?

WSTS regional sales should not be presented as a direct measurement of manufacturing location. Likewise, foundry revenues cannot simply be added to the chip revenues of their customers: doing so counts intermediate manufacturing services and finished semiconductor sales together.

The same issue applies to an investment portfolio. Adding a wafer supplier’s revenue to its customer’s chip revenue can be useful for ecosystem turnover, but it does not produce a clean measure of semiconductor value added.

A changing denominator can obscure a useful strategic gain

Italy may improve its position in power electronics while its share of total global semiconductor revenue remains flat or falls. That can occur if other categories grow faster.

The WSTS Spring 2026 forecast illustrates the importance of segment composition: its forecast acceleration was heavily concentrated in memory and logic. Those projections should not be treated as actual 2026 results, but they demonstrate why an aggregate revenue target can move differently from European power-semiconductor capability. Source: WSTS Spring 2026 forecast.

The EU’s 20% objective therefore needs a companion dashboard of segment positions, qualified production and resilience. Aggregate market share remains informative, but it cannot determine whether a particular Italian investment has reduced a critical dependency.

7.5. Funding measurement: calculate several shares, not one ambiguous percentage

The question “What share of Chips Act funding has Italy captured?” has no single valid answer until the denominator is specified.

An Italian project supported by a national grant can be relevant to the Chips Act without drawing its entire support from a central EU budget. An IPCEI project can also be partly financed through another European instrument. Adding those labels as separate financial contributions can double-count the same euro.

Table 7.4 — Funding indicators that should be reported separately

Indicator	Numerator	Denominator	Main analytical use
Share of approved project-specific aid	Approved aid for Italian projects	Approved aid for all comparable EU projects	National participation in the relevant approval portfolio
Share of national awards	Legally awarded support for Italian semiconductor projects	Clearly defined comparable awards	Domestic implementation of public commitments
Share of EU-level grants	EU contribution attributed to Italian beneficiaries	EU contribution under the same calls and period	Access to central collaborative funding
Share of disbursements	Cash paid under specified Italian measures	Cash paid under the same comparable universe	Actual fiscal execution
Project payment rate	Paid support	Awarded support for the same project	Progress from award to payment
Certified expenditure rate	Verified eligible expenditure	Approved eligible project expenditure	Financial implementation
Private capital mobilisation	Verified private financing or expenditure	Public support on a stated basis	Financing additionality, with clear limits
Operational delivery	Qualified capability achieved	Capability specified in the agreement	Industrial execution
Spillover delivery	Verified external users, transfers or licences	Agreed spillover obligations	Benefit beyond the recipient

The audited European funding architecture already demonstrates why these distinctions matter. Its combination of EU programmes, national aid and expected private investment cannot be reduced to a single cash fund without reconciliation. Source: European Court of Auditors, funding and monitoring analysis.

Technoprobe provides a useful example of the stronger evidence available when payment details are disclosed. Its report identifies two grants, their receipt date, eligible expenditure and final settlement status. The combined €2,459,095.62 equals approximately 22.64% of the reported €10,863,446.79 eligible costs. This calculation describes that particular completed project; it is not a comparable aid-intensity benchmark for a semiconductor factory. Source: Technoprobe first-half 2026 report, grant disclosures.

7.6. Evidence confidence and unresolved records

Confidence should attach to individual claims. The existence of a project can be established with high confidence while its eventual output remains highly uncertain.

High confidence means that a directly relevant primary record establishes the claim, with no material unresolved conflict.

Moderate confidence means that the mechanism or direction is well supported, but important implementation or measurement uncertainty remains.

Limited confidence means that material evidence is missing, inconsistent or insufficiently specific.

These labels express evidence quality. They are not numerical probabilities of project success.

Table 7.5 — Claim-level confidence assessment

Claim	Confidence	Basis	Remaining uncertainty
ST’s new Catania 200 mm operation entered manufacturing ramp in Q2 2026	High	Explicit company filing	Stable volume, yield and qualification
Catania’s full-build-out figure represents present capacity	Unsupported	The figure is a future target	Installed and qualified capacity by year
Silicon Box advanced through Invitalia financing approval in October 2026	High	Official municipal account	Binding detailed terms and subsequent execution
Silicon Box’s original production timetable remains validated	Limited	Later administrative sequence requires reconciliation	Updated integrated schedule
MEMC inaugurated FAB300 in October 2025	High	Dated company announcement	Current qualified shipments and utilisation
MEMC’s entire publicly supported programme can be allocated to FAB300	Not established	Programme labels do not provide asset-level reconciliation	Award and expenditure records
Italy’s share of all Chips Act-related public expenditure is known precisely	Not established here	No harmonised reconciled payment denominator	Common EU–national funding ledger
Domestic location alone guarantees priority access	Unsupported	Access depends on law, contracts, capability and product fit	Executable allocation and continuity arrangements
Completing complementary capabilities can improve the return on existing assets	Moderate	Strong industrial mechanism	Project-specific cost and adoption evidence

The unresolved records should be stated openly rather than replaced with estimates that look precise.

Table 7.6 — Priority records still needed

Unresolved record	Why it matters	Required evidence
Catania installed and qualified capacity trajectory	Determines realistic 2030 contribution	Tool commissioning, route capacity and product qualification by year
Catania project payments	Separates aid authorisation from fiscal execution	Award, certified expenditure and payment ledger
Relationship between earlier substrate assets and later campus expenditure	Prevents capital and aid double counting	Asset identifiers, upgrade records and eligible-cost reconciliation
Silicon Box updated critical-path schedule	Tests the original production target	Permits, construction, equipment, transfer and qualification schedule
Silicon Box finance through ramp	Tests completion and liquidity risk	Binding financing and contingency arrangements
Silicon Box customer adoption	Determines commercially usable capacity	Development agreements and production qualification milestones
MEMC qualified 300 mm shipments	Quantifies upstream resilience	Approved product families, shipment volume and utilisation
Italian programme-level funding total	Enables a defensible funding-share calculation	Deduplicated awards and payments by funding source
Site utility resilience	Identifies physical execution constraints	Capacity agreements and tested recovery arrangements
Pilot-line industrial transfer	Establishes value beyond infrastructure	External-user results and production adoption
Critical-product alternatives	Determines real autonomy gains	Bills of materials, approved alternatives and recovery times

A missing public record does not prove that the underlying condition is absent. It establishes a limit on what this public-source assessment can conclude.

7.7. Recommended analytical methods

Value-chain and dependency mapping

The mapping should use linked entities: legal company, ultimate parent, site, production process, product family, tool route, approved input and customer qualification.

This structure allows government to ask whether apparently separate facilities depend on the same material source, software licence, service team or overseas production stage. A simple list of company names cannot reveal those common points of failure.

Capacity benchmarking

Benchmarking should begin with installed and qualified production, then add announced projects as separate future entries.

SEMI’s World Fab Forecast is an appropriate professional source for facility-level benchmarking, but its public product description is not a substitute for access to the detailed dataset. Any assessment using licensed data should state the edition, extraction date, facility coverage and treatment of future projects. Source: SEMI World Fab Forecast.

Technology and manufacturing readiness

Technology readiness should be supplemented with manufacturing and commercial readiness.

A process demonstrated in a research environment may still lack production repeatability, supplier qualification or customer acceptance. Evaluation should therefore record separately: demonstrated technical function, reproducibility, pilot production, stable industrial yield, customer qualification and sustained commercial delivery.

Counterfactual investment analysis

Additionality should compare the supported project with a credible alternative available at the decision date.

The alternative can be investment abroad, external sourcing, a smaller project, a later investment or no investment. These alternatives produce different public benefits. The analysis should preserve contemporaneous evidence and test whether subsequent changes undermine the original rationale.

Scenario and sensitivity modelling

Project models should combine operating and financial variables, identify the critical path, and test correlated shocks. They should avoid assigning probabilities merely to create an apparently sophisticated expected value.

For government, a useful model identifies the conditions under which continued support, rephasing, restructuring or withdrawal becomes preferable.

Statistical and patent triangulation

Official statistics should support employment, value-added and trade analysis, but their industrial categories do not precisely match semiconductor production. Eurostat’s methodology explicitly works through broader activity classifications and statistical sources. Source: Eurostat ICT-sector metadata.

Patent analysis should examine families, legal status, ownership, technical relevance and geographic protection. Counting applications alone can overstate technological depth. It should be combined with engineering evidence, production experience and a separate freedom-to-operate assessment.

7.8. Ten priority intelligence questions for decision-makers

These questions are ordered by their immediate value for capital allocation, execution and continuity planning.

Table 7.7 — Priority intelligence agenda

Rank	Decision question	Evidence required	Proposed coordinating authority	Decision enabled
1	What qualified SiC output can Catania realistically deliver in 2030 and 2035 under current demand assumptions?	Installed tools, yield learning, product mix, customer approvals and equipment phases	MIMIT with the operator and relevant EU authorities	Pace and conditions of further support
2	Is Novara’s construction-to-qualification schedule financeable and technically credible after the October 2026 milestone?	Updated critical path, binding finance, transfer plan and contingencies	MIMIT, Invitalia and the project commissioner	Payment sequencing and schedule revalidation
3	Which European customers will use Novara, for which products and through which qualification programmes?	Customer development commitments, package requirements and production-release plans	MIMIT with the operator and industrial users	Whether additional ecosystem support is justified
4	How much support has actually been awarded and paid to Italian semiconductor projects, without duplication?	Linked EU, national and regional awards, expenditure and payments	MEF and MIMIT	Fiscal exposure and Italy’s defensible funding shares
5	What is the cost trajectory of qualified Italian SiC output against relevant global alternatives?	Full-route cost, yield, utilisation, depreciation, prices and reliability	MIMIT under confidential information arrangements	Whether the chosen investment configuration remains viable
6	Which critical automotive, defence, industrial and energy functions remain exposed after the projects operate?	Product bills of materials, approved routes and recovery times	Presidency of the Council with sector ministries	Targeted resilience procurement and qualification
7	Which materials and equipment-service dependencies are genuinely single-source?	Upstream mapping, licences, approved alternatives and replenishment	MIMIT, MAECI and EU counterparts	Supplier development and international agreements
8	How much qualified European demand can MEMC’s expanded production serve?	Customer approvals, product families, shipments and allocation commitments	MIMIT with MEMC and European fab customers	Whether further materials support removes a bottleneck
9	Are skills and utility commitments aligned with each project’s actual commissioning sequence?	Role-specific staffing, retention, power, water and recovery tests	Regions, infrastructure operators and employers	Infrastructure and training priorities
10	Are research and IPCEI programmes generating industrial transfers beyond their recipients?	External-user access, licences, completed prototypes and production adoption	Research ministries, MIMIT, Chips JU and programme owners	Continuation, redesign or termination of support

These questions require protected commercial information. A public report can identify the information requirement and test published claims; it cannot replace the detailed due diligence available to awarding authorities.

7.9. Governance: a decision system that connects money with capability

The government should maintain a concise ministerial dashboard supported by a detailed confidential record. The dashboard should report exceptions and decisions required, rather than reproduce promotional project descriptions.

Table 7.8 — Proposed monitoring cadence

Review layer	Frequency proposed	Core content	Decision responsibility
Project execution	Monthly during construction and ramp	Critical path, utilities, equipment, staffing and technical bottlenecks	Project owner and responsible implementation authority
Financial execution	Quarterly	Awards, payments, eligible expenditure, private finance and liquidity	MIMIT, MEF and awarding bodies
Industrial delivery	Quarterly	Qualified output, customer approvals, utilisation and yield trajectory	Operator with competent public authority
Ecosystem access	Semi-annually	External users, supplier qualification, research transfers and SME access	Programme and research-infrastructure owners
Critical-function resilience	At least annually and after major changes	Alternatives, stocks, recovery times and concentrated dependencies	Relevant sector ministries and national coordination
Portfolio allocation	Annually	Additionality, opportunity cost, European complementarity and scope changes	Presidency of the Council and responsible ministries
Independent evaluation	At major stage gates	Industrial outcomes, fiscal exposure and continuing rationale	Independent reviewers with protected data access

The proposed cadence is a governance recommendation. Existing contractual reporting obligations must be checked individually.

Public disclosure should cover the facts necessary for accountability: project scope, public support, milestone status and aggregated outcomes. Detailed recipes, customer designs and sensitive continuity arrangements belong in protected records accessible to authorised reviewers.

The resulting system should enable government to make a concrete decision when conditions change. More reporting without an agreed decision process would add administrative cost without improving execution.

Chapter 7 — Final net assessment

Italy’s investment portfolio can materially deepen European capability in power semiconductors, substrates, packaging and production-enabling technologies. Its strategic return depends on converting supported assets into qualified products, usable services and independent recovery routes.

The immediate priority is disciplined execution of the existing portfolio. Catania requires evidence of yield, qualified output and sustainable loading. Novara requires an updated, financeable construction and customer-qualification path. MEMC requires shipment and customer-approval evidence sufficient to quantify the value of its expanded capacity. Research and supplier programmes should be judged by industrial adoption.

Public support should purchase identifiable outcomes: additional European production, process knowledge, qualified alternatives, accessible infrastructure and continuity for critical functions. Announced capital expenditure is an input to that assessment.

The decisive sovereignty gain will be Europe’s ability to design, manufacture, package, qualify and sustain selected critical products through a disruption. Italy can contribute substantially to that capability. Establishing how much it has contributed requires reconciled financial records, product-specific operating evidence and explicit accounting for the dependencies that remain.

---

Copyright of debuglies.com – Even partial reproduction of the contents is not permitted without prior authorization Reproduction reserved